similar to: UPS Lyonn 2000-ULT KRM

Hi, I'm from Argentina, this model isn't in the hardware compatibility list: Lyonn ULT-2000 MKR http://www.solytec.com.ar/p03_ups_lyonn_ult1000.php http://www.solytec.com.ar/p03_ups_lyonn_ultrack.php How can I do to control via SNMP? I have an AgentMini hardware. Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

[Please keep the list CC'd - thanks!] > On Jun 3, 2016, at 11:58 AM, Marcos Martinez <marcosdmm at gmail.com> wrote: > > But I have to use my ups MIB file?? > Megatec gives a MIB file from his webpage, I think is NetAgent mini MIB. > I have to use that?? I am not familiar with all of the MIBs, but the NUT driver incorporates information from the supported MIBs - it

Lyonn CTB-1200 root at frambuesa:~# upsc lyonn at localhost battery.voltage: 27.20 battery.voltage.nominal: 24.0 beeper.status: enabled device.type: ups driver.name: blazer_usb driver.parameter.pollinterval: 2 driver.parameter.port: auto driver.version: 2.4.3 driver.version.internal: 0.03 input.current.nominal: 5.0 input.frequency: 49.9 input.frequency.nominal: 50 input.voltage: 213.3

I have one of those new little NUC's and installed Centos 7.1 on it. lspci shows 00:00.0 Host bridge: Intel Corporation Haswell-ULT DRAM Controller (rev 09) 00:02.0 VGA compatible controller: Intel Corporation Haswell-ULT Integrated Graphics Controller (rev 09) 00:03.0 Audio device: Intel Corporation Haswell-ULT HD Audio Controller (rev 09) 00:14.0 USB controller: Intel Corporation 8 Series

On Wed, Sep 23, 2015 at 7:39 AM, Fabian Arrotin <arrfab at centos.org> wrote: > -----BEGIN PGP SIGNED MESSAGE----- > Hash: SHA1 > > On 23/09/15 08:00, C. L. Martinez wrote: >> Hi all, >> >> Is it possible to upgrade intel X11 org driver on CentOS7?? Maybe >> with elrepo's packages: >>

Hi ups-devel, As I looked throw www.networkupstools.org site, haven't found any pointers where to send patches, so I hope this is the right place. (Please let me know weather this is the right place.) The patch contains a minor change in the logic of the driver, our Effekta MHD 3000 UPS continuously writes status data to the serial port, so one has to send a CR character and empty the

Howdy, I've been trying for a while now to get this running. Can anybody please tell me what the proper configuration is for this unit ??? This is what I've got/tried so far: # cat ups.conf # Start with # # # upsdrvctl -u nut -D start MEGATEC MODE=netserver user=nut # Ultra ULT33046 2000 VA 1200 W

Hi list here is the patch to make fentonups recognize some PowerCOM's UPS's, and to setup terminal lines for them (at least for SMK-1500a) as powercom's original upsmon do. fentonups -x powercom works correctly with SMK-1500a (it screamed ''Communications with UPS lost - check cabling' or 'Short read during UPS id sequence' without this patch). Sorry for

For void test0(unsigned short a, unsigned short * in, unsigned short * out) { for (unsigned short w = 1; w < a - 1; w++) //this will never overflow out[w] = in[w+7] * 2; } I think it will be sufficient to add a couple of new cases to ScalarEvolution::HowManyLessThans -- zext(A) ult zext(B) == A ult B sext(A) slt sext(B) == A slt B Currently it bails out if it sees a non-add

On Thu, Apr 25, 2013 at 9:18 AM, Arnold Schwaighofer < aschwaighofer at apple.com> wrote: > > On Apr 25, 2013, at 10:51 AM, Preston Briggs <preston.briggs at gmail.com> wrote: > > > It's an interesting problem. > > The best stuff I've seen published is by Cooper, Eckhart, & Kennedy, in PACT '08. > > Cooper gives a nice intro in one of his

As far as I can understand of the code, the Reassociate tries to achieve this result by its "ranking" mechanism. If it dose not, it is not hard to achieve this result, just restructure the expression in a way such that the earlier definition of the sub-expression is permute earlier in the resulting expr. e.g. outer-loop1 x= outer-loop2 y =

On Apr 25, 2013, at 10:51 AM, Preston Briggs <preston.briggs at gmail.com> wrote: > It's an interesting problem. > The best stuff I've seen published is by Cooper, Eckhart, & Kennedy, in PACT '08. > Cooper gives a nice intro in one of his lectures: http://www.cs.rice.edu/~keith/512/2012/Lectures/26ReassocII-1up.pdf > I can't tell, quickly, what's going on

On Apr 23, 2013, at 10:37 AM, Shuxin Yang <shuxin.llvm at gmail.com> wrote: > As far as I can understand of the code, the Reassociate tries to achieve this result by its "ranking" mechanism. > > If it dose not, it is not hard to achieve this result, just restructure the expression in a way such that > the earlier definition of the sub-expression is permute earlier in

Hi, I am investigating a performance degradation between llvm-3.1 and llvm-3.2 (Note: current top-of-tree shows a similar degradation) One issue I see is the following: - 'loop invariant code motion' seems to be depending on the result of the 'reassociate expression' pass: In the samples below I observer the following behavior: Both start with the same expression: %add = add

Hi, I'm working on OpenCL and I'm using clang as compiler (based on clang 3.7.0). I have a issue, I'm generating a bitcode file (that I can print before before the generation). But when I'm trying to read it again with clang, I have this issue: "error: Invalid record" How can I managed to know where it comes from? Thank you, Romaric Here is what is print before the

Hello Thanks for looking into this. I can't be very confident what the knock on result of a change like that would be, especially on architectures that are not Arm. What I can do though, is run some benchmarks and look at that results. Using this patch: --- a/lib/Transforms/InstCombine/InstructionCombining.cpp +++ b/lib/Transforms/InstCombine/InstructionCombining.cpp @@ -150,6 +150,9 @@

It's an interesting problem. The best stuff I've seen published is by Cooper, Eckhart, & Kennedy, in PACT '08. Cooper gives a nice intro in one of his lectures: http://www.cs.rice.edu/~keith/512/2012/Lectures/26ReassocII-1up.pdf I can't tell, quickly, what's going on in Reassociate; as usual, the documentation resolutely avoids giving any credit for the ideas. Why is that?

While looking at what llvm writes for this testcase, I noticed that there is one redundant operation in resulting assembly. The second 'cmp' operation there is essentially identical to the first one, with reversed order of arguments. Therefore, it is not needed. This testcase is a simple integer comparison routine, similar to what qsort would take to sort an integer array. I think

Example: define i8 @narrow_add(i8 %x, i8 %y) { %x32 = zext i8 %x to i32 %y32 = zext i8 %y to i32 %add = add nsw i32 %x32, %y32 %tr = trunc i32 %add to i8 ret i8 %tr } With no data-layout or with an x86 target where 8-bit integer is in the data-layout, we reduce to: $ ./opt -instcombine narrowadd.ll -S define i8 @narrow_add(i8 %x, i8 %y) { %add = add i8 %x, %y ret i8 %add } But on

I am investigating changing BoundsChecking to use address-based rather than size- & offset-based tests. To explain, here is a short code sample cribbed from one of the tests: %mem = tail call i8* @calloc(i64 1, i64 %elements) %memobj = bitcast i8* %mem to i64* %ptr = getelementptr inbounds i64* %memobj, i64 %index %4 = load i64* %ptr, align 8 Currently, the IR for bounds checking