similar to: BoF: Debug info for optimized code.

On 11/1/2016 4:28 PM, Martin J. O'Riordan via llvm-dev wrote: > I do not even pretend to know much about Dwarf and the representation of debug information, but it does appear that there is little or no support for the idea that a single "instruction" can correspond to multiple diverse lines in the source file. There is. There is even a patch for LLVM:

Hi Martin, Yes, the patch only changes the format of line information. There will be more work needed for fully implementing it across all tools. Here your concern still stands---more focus on debug information for VLIW architectures would be welcome. I was only pointing out that the necessary capacity of the debug information to carry this data does in fact exist, and that at least one step

I'll happily propose one. I just usually wait for someone to bring it up. :) -eric On Aug 27, 2014 3:13 PM, "David Blaikie" <dblaikie at gmail.com> wrote: > I haven't heard of one being proposed, but happy to chat. I wasn't sure > how much came it if last year's. > On Aug 27, 2014 7:00 AM, "Rafael Espíndola" <rafael.espindola at gmail.com>

Hi, Has anyone proposed a BOF on debug info for the next dev meeting? The one last year was quiet informative. This year the date might coincide with me trying to figure out how to make debug info processing lazier during LTO, so it would be an awesome opportunity to discuss it with developers that are more familiar with it :-) Cheers, Rafael

Hello debug-info fans, There has been a lot of activity in the debug-info area lately, and I was wondering if there's interest in a BoF session this April. Alternatively we could just have a hacker-lab table again, which worked out pretty well at the last US meeting. Some potential discussion topics for the BoF/table could be: * Improving debugging of optimized code ** Defining what -Og

Hi all, I'm organizing a BoF session during the upcoming EuroLLVM developers meeting. As the subject of this message already shows, this session will be on compilers in education. I'm currently looking for both participants to the discussion and input for the actual program of the session. I've already got some ideas which I'll introduce below. At our university, we mostly

Dear community, In preparation for the BoF on Parallel IR at the US developers meeting we would like to collect feedback from the whole community. The concerns, ideas, etc. will be summarized in the BoF and should provide a good starting point for a discussion. We know that over the years the topic of a parallel extension for LLVM was discussed on the mailing list [0, 1, 2], workshops [3, 4] or

Hi all, I am working on a CGRA backend (something like a 2D VLIW), and we also absolutely need predication. I extended the IfConversion pass to allow it to be executed multiple times and to predicate already predicated code. This is necessary to predicate code with nested conditional statements. At this point, we support or, and, and conditional predicates (see Scott Mahlke's papers on this

We are currently doing something similar to your third option in Hexagon backend. But it is a VLIW so predication is not the only reason for that. Sergei --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Marcello

hi, we're trying to come up with a static compiler based on llvm for a 4- way vliw architecture with full support for predicated execution. a distinguishing feature is the omission of flag registers. instead, conditions can be paired with a particular instruction within the same bundle. a performance critical issue will be proper use of predicated execution. if-conversion can either

Hello, I'm working on a compiler based on LLVM for a SIMD architecture that supports instruction predication. We would like to implement branching on this architecture using predication. As you know the LLVM-IR doesn't support instruction predication, so I'm not exactly sure on what is the best way to implement it. We came up with some ways to do it in LLVM: - Do not add any

Folks, OLS is fast approaching. There is a session on virtualization at the Kernel Summit, with Keir and Zach invited, which will probably last an hour(?). There is also a Xen BoF currently scheduled (Thursday, 7/20, 7:00PM) which will cover Xen specific issues. And there are approximately 3 or 4 paper presentations on related subjects. None of the above are going to allow for adequate time to

Hi, I've done work on predicated SIMD representations for LLVM. If you search through the archives, you may find my "applymask" proposal, which is an attempt at representing predication in a very comprehensive way. I've since stopped pushing the proposal in part because Larrabee's changing fortunes led to a decline of interest at the time, in part because the proposal

On 20 August 2014 00:24, Gerolf Hoflehner <ghoflehner at apple.com> wrote: > My experience from leading BOFs at other conferences is more talk than action. So I suggest a different setup for this topic: how about having a working group meeting with participants who can commit time to work on this topic? Mine too, but in this case I have to say it wasn't at all what happened. It

Dear community, We are trying to setup a BoF ( Raising Next Generation of LLVM Developers, http://sched.co/8Yzs). In our academic-oriented environments the main work force is students: undergrads, grads or PhD (rarely postdocs). Often we have limited time to bring somebody up to speed and we have to it in a productive and motivating for both parties way. I believe most of you had

Hello everyone. I apologise for the sizeable delay in sending this. The BoF was attended by quite a lot of people and there was general agreement that tablegen needs improvement in some shape of form. However there are many divergent ideas as to how to go about this improvement. Of course this is completely natural, tablegen being a versatile tool used by many different people for many different

Hey folks, Do we have proposals for an HPC focused BoF at EuroLLVM? I'd like to discuss the current efforts around integrating Polly, parallel IR efforts and vectoriser support in VPlan (like outer loop), as well as coordination on the next steps around Flang. -- cheers, --renato

All, I have arranged for an LLVM BoF at SC13 in Denver: http://sc13.supercomputing.org/schedule/event_detail.php?evid=bof143 If you will be at SC13, have an interesting project based on or within LLVM, and would be willing to come to the BoF and spend 10 minutes or so giving an overview of it, please email me. I am trying to get a collection of people together to talk about vectorization and

I am going to submit a proposal for a Xen BOF at DC18. Here is my first cut at a draft abstract: Title: Xen in Debian BoF Format: workshop with 25 min slot The Xen packages in Debian are in need of some work, including some tidying up, upstreaming of some Makefile patches, and updating to new versions. There is a large outstanding bug list. Also with the demise of Alioth and the

On Wed, Oct 31, 2012 at 09:13:43PM +0100, Bjorn De Sutter wrote: > Hi all, > > I am working on a CGRA backend (something like a 2D VLIW), and we also absolutely need predication. I extended the IfConversion pass to allow it to be executed multiple times and to predicate already predicated code. This is necessary to predicate code with nested conditional statements. At this point, we