similar to: Regarding basic block layout/code placement optimizations of profile guided optimization (PGO)

Hi Craig, Thanks for the information. Can you point to the source that specifies tGPR to be R0 - R7? I tried to search in ARMInstrThumb.td but couldn’t find it. Thanks, - Jie On Apr 14, 2019, at 15:28, Craig Topper <craig.topper at gmail.com<mailto:craig.topper at gmail.com>> wrote: I believe there is probably a separate instruction in LLVM for thumb2 add. Probably starting with t2

Sorry for not being specific enough. ARMv7-M includes Thumb and Thumb2. It has 12 regular registers (R0 - R12), and R8 - R12 are used. I can generate mov instruction that from/ R8-R12 to/from R0-R6. From this ARM page http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0068b/ch03s03s01.html R9 - R12 have their conventional usage, but I don’t if this is the reason we cannot use them

Hello, I’m writing machine function passes for programs running with ARMv7-M ISA. My pass adds some instructions to the original code, and now I got fatal error: error in backend: out of range pc-relative fixup value when llvm generates native code after running the transformation pass. I think it’s because my transformation pass increases the size of the original code and thus some branch

Dear Henrik, thank you, for the quick reply. Bizarrely enough, the problem vanished when I woke the computer from sleep (I had previously replicated the problem after several restarts of both R and the MacOS). I will follow-up if I can again replicate the problem. Florian On 2/10/18 4:39 PM, Henrik Bengtsson wrote: > A few quick comments: > > * You mention R --vanilla, but make sure

Dear All, I’m working on a project that extends C. I’m adding a new type of pointer that is a fat pointer. It has some metadata about the pointed object besides the starting address of the object. Currently I implemented this pointer as an llvm:StructType. In llvm::Type generation function llvm::Type *CodeGenTypes::ConvertType(QualType T) in the case for clang::Type::Pointer, instead of creating

Hello Community, I have submitted my draft proposal for this project on the summer of code web site and shared it with the community. Please take a look at it and suggest/ comment some modifications. I have already done some study on the relevant code. I will still do some more before the final submission but this is more of designing challenge please help ! Sincerely, *Vivek Pandya*

Hello, I’m trying to get the SAFECode compiler up and running for work I’ll be doing, and in trying to configure LLVM (according to the information at http://llvm.org/docs/GettingStarted.html), I ran into some confusion. In step 8 in the section "Getting Started Quickly (A Summary)”, I realized that I wouldn’t be able to follow the steps exactly as described, because they tell me to create

Dear All, In my development, a function returns a struct {i8*, i64}, and on the call site I need to assign the return value to a struct of type {some_struct*, i64}. One way to do it is to call the mutateType() method of llvm::Value on the return value of the function call; however, I’m concerned that this mutateType() method might be too disruptive (it’s discouraged to use it by the

Hi all, I can't get the functionality of the package parallel to work. Specifically, makeCluster() hangs when I run it. I first noticed the problem when trying to run Rstan with multiple cores and the traced it back to the core package parallel. The following results in R hanging after the call to makeCluster. library(parallel) # Calculate the number of cores no_cores <-

Dear all, I’m developing Clang&LLVM on MacOS Catalina 10.15. Now every time I "make clang", the building systems rebuilds all the .inc files generated by cmake, which essentially rebuilds all the tablegen files in llvm, although I did not change any of the tablegen files. The building is unnecessary and slow, especially when it builds the X86GenSubtargetInfo.inc. Is there a way to

Hi all, I’m trying to insert some add/sub and push/pop instructions in a MachineFunction pass for ARMv7-M. However, I encountered something weird. For an add, when I use BuildMI(….., TII->get(ARM::tADDi8), reg).addReg(reg).addReg(reg).addImm(imm). if reg is R0 - R7, everything is fine: I would get something like adds r1, 4 But if I use R8 - R12 as the reg in the BuildMI, I wouldn’t get

> On May 6, 2020, at 21:53, Krzysztof Parzyszek <kparzysz at quicinc.com> wrote: > > You can > 1. extract individual elements of {i8*, i64}, > 2. bitcast the first to some_struct*, > 3. insert them into a new struct of type {some_struct*, i64}. Thanks for the help. I’m thinking the same way. Now I’m stuck with how to create a struct; I know how to create a

I've successfully used Peter's patches to get past those relocation errors. On 6/28/17, 9:36 AM, "llvm-dev on behalf of Peter Smith via llvm-dev" <llvm-dev-bounces at lists.llvm.org on behalf of llvm-dev at lists.llvm.org> wrote: Yes it should cover the following relocations: R_ARM_CALL (ARM BL/BLX) R_ARM_JUMP24 (ARM B) R_ARM_THM_CALL (Thumb BL/BLX)

At a guess that looks like your llvm and lld checkouts are not quite in synch. It will be worth updating llvm and lld to top of trunk. I've rebased the consolidated patch https://reviews.llvm.org/D34634 this morning, it might be worth trying that if you are seeing problems. Peter On 29 June 2017 at 22:09, Alessandro Pistocchi <apukfreelance at gmail.com> wrote: > Hi, I tried

The bottom of the bug has the revision numbers (e.g. D34035). That one corresponds to e.g. https://reviews.llvm.org/D34035 There's also https://reviews.llvm.org/D34634 which contains all of Peter's patches, but it's not going to rebase cleanly once the individual patches start going in. On 6/28/17, 10:56 AM, "Alessandro Pistocchi" <apukfreelance at gmail.com> wrote:

Oh, so it looks like I hit a bit of a wall there :-) I’ll take a look thanks. That bug talks about R_ARM_THM_CALL which I assume are thumb related. Will your implementation fix also R_ARM_CALL errors? > On 28 Jun 2017, at 17:15, Peter Smith <peter.smith at linaro.org> wrote: > > Hello Alessandro, > > The LLD ARM port doesn't currently support range extension thunks,