similar to: Invoke clang options in clang-cl.

Hi there , I use clang-cl /Qvec test.c to compile the code. But the pass LoopVectorizer is never invoked. I was wondering if this is sufficient to enable auto vectorizer? Thanks, Xiaochu -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160811/8b6cb760/attachment.html>

Hi Andrey, Thanks. I found even when loop vectorizer and SLP vectorizer are enabled, my simple test still not get optimized. I also tried clang pragma in my test to force vectorization. What do you think is the problem? Test: #define SIZE 8 void bar(int *A, int* B,int K) { #pragma clang loop vectorize(enable) vectorize_width(2) unroll_count(8) for (int i = 0; i < SIZE; ++i) A[i]

Hi Daniel, I increased the size of your test to be 128 but -stats still shows no loop optimized... Xiaochu On Aug 12, 2016 11:11 AM, "Daniel Berlin" <dberlin at dberlin.org> wrote: > It's not possible to know that A and B don't alias in this example. It's > almost certainly not profitable to add a runtime check given the size of > the loop. > > >

I'm not compiling it to x86. Should loop optimizer something independent of the target? If so, should the vectorized code on IR level? On Aug 12, 2016 11:39 AM, "Daniel Berlin" <dberlin at dberlin.org> wrote: > cat > test.c > > #define SIZE 128 > > void bar(int *restrict A, int* restrict B,int K) { > > #pragma clang loop vectorize(enable)

Hi there, I was wondering if there is a way to set llc flags in clang? Like llc -mattr=+abc How to set this subtarget in clang? Thanks, Xiaochu -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160808/d641eef1/attachment.html>

Nice! Thanks, Tom. It works. On Wed, Sep 9, 2015 at 12:30 PM Tom Stellard <tom at stellard.net> wrote: > On Wed, Sep 09, 2015 at 07:21:30PM +0000, Xiaochu Liu via llvm-dev wrote: > > Dear there, > > > > I'm trying to use clang to invoke my backend to generate obj code using > > command: > > > > clang -target x-linux-gnu global.c -c > > >

Thanks, Craig. So, clang -Xclang -disable-llvm-passes actually disables all the LLVM passed populated by clang so that there is no middle-end optimization on bc files. clang -O2 LULESH.c //clang is the driver, invoking cc1, cc1as, ld //options can be passed through to cc1 directly. //maybe have different names, e.g.

//mllvm Options can be dumped by clang -v -help -mllvm and clang -v --help-hidden --> //mllvm Options can be dumped by clang -v -help -mllvm and clang -v --help-hidden -mllvm On Tue, Jan 9, 2018 at 3:09 AM, toddy wang <wenwangtoddy at gmail.com> wrote: > Thanks, Craig. > > So, clang -Xclang -disable-llvm-passes actually disables all the LLVM > passed populated by clang so

Oh, they have selection details in the end. Let me check that first... On Sat, Jul 4, 2015 at 4:05 PM Xiaochu Liu <xiaochu1122 at gmail.com> wrote: > Hi Matt, > > I tried debug-only=isel and have some more informations. > The steps before 'Legalized selection'( excluding it) all use v2i32 load. > At the step of 'Legalized selection', it replaced one v2i32

Tried a small test just now to see how exception handling on Windows is getting on, and it seems to work except for one thing. clang-cl /EHsc (the Microsoft compiler option to enable exceptions) doesn't do anything; they remain disabled. However, -Xclang -fcxx-exceptions succeeds. Is this a bug in the handling of compatibility options or am I missing something? -------------- next part

Dear there, I'm trying to use clang to invoke my backend to generate obj code using command: clang -target x-linux-gnu global.c -c But it shows me an error: clang: error: assembler command failed with exit code 1 (use -v to see invocation) I have assembler setup in my backend but it is incorrectly setup (not currently using any assembler). Is there a way for clang to not invoke assembler

Hi Marcello, Thanks for your reply. I will try to pass down the mask! I have one more question. In my backend I return CSR_RegMask in getCallPreservedMask and return CSR_SaveList in getCalleeSavedRegs. Is that a correct setup? I dumped the regmask and found that callee saved regs are marked 1 and non-callee saved regs are 0. Thanks, Xiaochu On Wed, Aug 26, 2015 at 5:58 PM Marcello Maggioni

Hi Tim, Thanks for your message! It turns out that the infrastructure (an outdated one) that I am working on is using gcc+dragonegg to generate llvm code: gcc -m32 -S -c -O0 -fplugin=$(DRAGONEGG_SO) -fplugin-arg-dragonegg-emit-ir $< -o $@.tmp It directly generates llvm code with fadd, etc. I'm not familiar with dragonegg plugin... Thanks, XIaochu On Wed, Mar 16, 2016 at 12:00 PM,

Hi Hal, Thanks for your reply and it is helpful! I have a quick question: When I use BuildMI to build instructions in this case, do I have to add all three of the register operands explicitly (operand 0 and 1 are the same)? Thanks, Xiaochu On Tue, Nov 24, 2015 at 3:14 PM, Hal Finkel <hfinkel at anl.gov> wrote: > ----- Original Message ----- >> From: "Xiaochu Liu via

Yes that is what he meant. "-dce, -adce, etc" are command line options consumed by tools/opt/opt.cpp to give to the PassManagerBuilder that it creates. The parsing of those options doesn't exist in any of the llvm library code that is linked into clang. Clang has its own code for populating a PassManagerBuilder in tools/clang/lib/CodeGen/BackendUtil.cpp ~Craig On Mon, Jan 8, 2018

My question is: How do I make clang to generate assembly with vector instruction for my target? The back story is: I've added a few vector instructions to my target and confirmed that they are used by running my code on the test below and using a following command: opt i.esencia.ll -S -march=esencia -mcpu=esencia -loop-vectorize | llc -mcpu=esencia -o i.esencia.s target datalayout =

Thanks. I'm gonna try tomorrow and let you know. On Thu, Jul 2, 2015 at 6:51 PM Matt Arsenault <Matthew.Arsenault at amd.com> wrote: > On 07/02/2015 06:41 PM, Xiaochu Liu wrote: > > Hi Matt, > > > > I did call addRegisterClass in TargetLowering for all the possible > > types in the register. And for typecasting instructions (i32 to i64), > > it works.

Dear there, I was trying to compile a code with only integer type variables and integer operations. Clang/llvm kept showing me llvm code with floating-point instructions (fmul, fadd, fptosi, etc.). Is there a way in Clang or llvm to stop the compiler from doing that? My experiment does not allow floating-point operations... Thanks, Xiaochu

Dear there, I was wondering how to preserve registers (caller saved) across calls. I implemented getCalleeSavedRegs and getCallPreservedMask. But the non-callee-saved registers are still not saved by caller. I want to spill these registers in use on stack right before the call. From my understanding, the register allocator in llvm will do the spill and restoring automatically? Is there anything I

yes, this is valid assuming bb9 dominates bb10. Not sure what you mean by "support this", unless your tool doesn't handle certain types of CFG's On Wed, Mar 30, 2016 at 8:12 PM, Xiaochu Liu via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Dear there, > > Is the following phi instruction valid? > > %j_8 = phi i32 [ %j_100, %"<bb 13>" ], [