Displaying 20 results from an estimated 2000 matches similar to: "Allowing virtual registers after register allocation"
2015 Dec 10
2
Allowing virtual registers after register allocation
On Wed, Dec 9, 2015 at 3:02 PM Hal Finkel <hfinkel at anl.gov> wrote:
> ----- Original Message -----
> > From: "Derek Schuff via llvm-dev" <llvm-dev at lists.llvm.org>
> > To: llvm-dev at lists.llvm.org
> > Sent: Wednesday, December 9, 2015 4:31:31 PM
> > Subject: [llvm-dev] Allowing virtual registers after register allocation
> >
> >
2015 Dec 10
3
Allowing virtual registers after register allocation
> On Dec 9, 2015, at 4:13 PM, Quentin Colombet <qcolombet at apple.com> wrote:
>
> Hi,
>
> I would actually go the other direction, i.e., stick to physical registers but with an infinite number.
> The rational is that after register allocation we broke all the nice properties of the pre-alloc virtual registers. For instance, the existing liveness algorithm cannot be used
2015 Dec 10
2
Allowing virtual registers after register allocation
> On Dec 10, 2015, at 9:39 AM, Hal Finkel <hfinkel at anl.gov> wrote:
>
>
>
> ----- Original Message -----
>> From: "Quentin Colombet" <qcolombet at apple.com>
>> To: "Derek Schuff" <dschuff at google.com>
>> Cc: "Hal Finkel" <hfinkel at anl.gov>, llvm-dev at lists.llvm.org
>> Sent: Wednesday, December
2015 Dec 10
2
Allowing virtual registers after register allocation
> On Dec 10, 2015, at 10:49 AM, Derek Schuff <dschuff at google.com> wrote:
>
>
>
> On Thu, Dec 10, 2015 at 10:13 AM Quentin Colombet <qcolombet at apple.com <mailto:qcolombet at apple.com>> wrote:
>
> I am tempted to think no, we don’t, but I don’t know the use cases.
> What post-RA passes with want to run with virtual regs?
>
> The immediate
2016 Jan 22
2
Allowing virtual registers after register allocation
Here are 2 patches, which are independent of each other.
The first splits PrologEpilogInserter into 2 parts :
http://reviews.llvm.org/D16481
After looking at the code I thought it made more sense for the major split
to include whether callee-saved register spills are supported. So for
non-virtual targets, virtual registers are not supported and scavenging is
optionally supported, and vice versa
2016 Jan 13
2
Allowing virtual registers after register allocation
We had some additional discussion on this. There is a lot of concern
generally about post-RA passes which do not expect to have to handle
virtual registers; specifically if they unexpectedly start seeing virtual
registers, or if they work today but start making assumptions in the
future. We discussed considering a mechanism that would require
MachineFunctionPasses to "opt-in" and declare
2016 Jan 22
2
Allowing virtual registers after register allocation
> On Jan 22, 2016, at 1:23 PM, Matthias Braun <mbraun at apple.com> wrote:
>
>>
>> On Jan 22, 2016, at 12:29 PM, Derek Schuff <dschuff at google.com <mailto:dschuff at google.com>> wrote:
>>
>> Here are 2 patches, which are independent of each other.
>>
>> The first splits PrologEpilogInserter into 2 parts :
2015 Dec 10
3
Allowing virtual registers after register allocation
To say this first: This whole discussion about using virtregs until emit or having growable physregs is hard to argue without actually having experience trying to go either way.
Problems when using virtregs throughout the backend until emit time:
- The MC layer is using MCPhysReg (which is an uint16_t) and would need retrofitting to support virtregs
- VirtRegs are assumed to have a definition,
2009 May 13
0
[LLVMdev] MSVC compile error with trunk
On Tue, May 12, 2009 at 11:55 PM, Chris Lattner <clattner at apple.com> wrote:
> Dan, can you add IVUsers.cpp to the appropriate cmakefile?
>
> -chris
>
>
> On May 12, 2009, at 10:54 PM, OvermindDL1 wrote:
>
>> On Tue, May 12, 2009 at 11:40 PM, Chris Lattner <clattner at apple.com>
>> wrote:
>>>
>>> On May 12, 2009, at 10:24 PM,
2018 Nov 17
2
Generating exported wasm functions
Using LLVM v5, my Cone compiler (https://github.com/jondgoodwin/cone)
automatically directly generated all functions as named and exported for
both wasm text and binary files (not using clang/lld etc, but using the
API).
Upgrading to LLVM v7, generated wasm object files now fail, exhibiting
markedly different behavior, behavior that varies between the text and
binary files. For example, the
2019 Nov 20
2
Question about physical registers in ISel
Can you elaborate on the fix you are thinking of? I'm not sure what you're
thinking should change.
On Tue, Nov 19, 2019 at 3:51 PM Quentin Colombet <qcolombet at apple.com>
wrote:
> It sounds to me that we should fix SDISel to accept both physical and
> virtual definitions on variadic instructions. Though I wouldn’t bother
> adding the support for implicit virtual
2020 Apr 20
3
[cfe-dev] State of NaCl in monorepo?
Hi Fangrui,
As you noted we are working on helping our NaCl users transition to
WebAssembly and new web APIs that cover the functionality offered by NaCl.
In terms of actually turning down the platform features, we recently
announced a timeline at
https://blog.chromium.org/2020/01/moving-forward-from-chrome-apps.html.
In terms of LLM, I would prefer to keep the support we have in the tree
until
2010 Aug 27
0
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
On 08/27/2010 11:05, Dale Johannesen wrote:
>>>> Function only has on BB. Is this wrong that it has both
>>>> TCRETURNri64 and RET in one BB?
>>>
>>> Yes, that is wrong. The reason emitEpilogue isn't lowering the
>>> TCRETURN is that it doesn't see it, it only sees the RET. The real
>>> problem will be where that RET is
2009 Jan 07
2
[LLVMdev] Possible bug in the ARM backend?
Hi Evan,
Thanks for your feedback!
2009/1/7 Evan Cheng <evan.cheng at apple.com>:
>
> On Jan 7, 2009, at 2:48 AM, Roman Levenstein wrote:
>
>
> As you can see, PrologEpilogInserter has inserted at the beginning
> of the function some code for manipulation of the frame pointer and
> this inserted code uses the LR register.
> As far as I understand,
2009 Mar 16
3
[LLVMdev] Shrink Wrapping - RFC and initial implementation
Here is the latest shrink wrapping patch, with fixes for issues identified
by Evan.
I am including a few small additions/fixes to
include/llvm/ADT/{SparseBitVector,DepthFirstIterator}.h.
Files:
include/llvm/ADT/DepthFirstIterator.h
include/llvm/ADT/SparseBitVector.h
lib/CodeGen/PrologEpilogInserter.cpp
Evan, let me know how it looks when you get a chance.
Thanks much,
John
>
2009 May 13
3
[LLVMdev] MSVC compile error with trunk
Does not seem to be a straight error with LLVM itself, but rather the
tools, linking issues, here are the errors:
Opt:
30> Creating library
R:\SDKs\llvm\trunk_VC8_building\lib\Debug\opt.lib and object
R:\SDKs\llvm\trunk_VC8_building\lib\Debug\opt.exp
30>LLVMScalarOpts.lib(IndVarSimplify.obj) : error LNK2019: unresolved
external symbol "public: bool __thiscall
2012 Nov 11
2
[LLVMdev] register scavenger
You mean when I "explicity" use it by calling methods of register scavenger?
Right now I'm just allocating virtual registers that will be resolved by
the use of register scavenger and I'm also providing an override of the
virtual method saveScavengerRegister. In Mips16, I have an extra mips 32
register (not usually very useful since it can only be used
in a move instruction)
2008 Dec 29
0
[LLVMdev] Controlling the stack layout
Hi, Nicolas
> Could you point me where those hooks are in the llvm code? I didn't find
> any.
Look into PrologEpilogInserter.cpp::PEI::runOnMachineFunction(). There
are calls to hooks inside TargetRegisterInfo:
TargetRegisterInfo::processFunctionBeforeCalleeSavedScan() and
TargetRegisterInfo::processFunctionBeforeFrameFinalized().
Maybe they are not so convenient when working via JIT
2020 Jun 24
2
Renaming passes
On 6/24/20 11:21 AM, Matt Arsenault via llvm-dev wrote:
>
>
>> On Jun 24, 2020, at 14:13, Arthur Eubanks via llvm-dev
>> <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
>>
>> Hi,
>>
>> As part of new pass manager work, I've been trying to get something
>> like `opt -foo` working under the NPM, where `foo` is
2020 Jun 24
2
Renaming passes
> On Jun 24, 2020, at 19:17, Arthur Eubanks <aeubanks at google.com> wrote:
>
>
>
> On Wed, Jun 24, 2020 at 12:23 PM Philip Reames <listmail at philipreames.com <mailto:listmail at philipreames.com>> wrote:
>
>
> On 6/24/20 11:21 AM, Matt Arsenault via llvm-dev wrote:
>>
>>
>>> On Jun 24, 2020, at 14:13, Arthur Eubanks via