llvm dev - Dec 2015 - Allowing virtual registers after register allocation

On Wed, Dec 9, 2015 at 3:02 PM Hal Finkel <hfinkel at anl.gov> wrote:
> ----- Original Message -----
> > From: "Derek Schuff via llvm-dev" <llvm-dev at
lists.llvm.org>
> > To: llvm-dev at lists.llvm.org
> > Sent: Wednesday, December 9, 2015 4:31:31 PM
> > Subject: [llvm-dev] Allowing virtual registers after register
allocation
> >
> >
> > Hi all,
> > Virtual ISAs such as WebAssembly and NVPTX use infinite virtual
> > register sets instead of traditional phsyical registers.
> > PrologEpilogInserter is run after register allocation and asserts
> > that all virtuals have been allocated but doesn't otherwise depend
> > on this if scavenging is not needed. We'd like to use the
> > target-independent PEI code for WebAssembly, so we're proposing a
> > TargetRegisterInfo hook for targets to indicate that they use
> > virtual registers in this way (currently called
> > usesVirtualRegstersAfterRegAlloc(), other suggestions welcome). The
> > code is at http://reviews.llvm.org/D15394 and an example of the
> > intended use for WebAssembly is at http://reviews.llvm.org/D15344 .
> >
>
> I think this makes sense, and generally speaking, I think it will be good
> for us to have better support for VM targets without fixed-sized register
> sets.
>
> Bikeshedding: usesVirtualRegstersAfterRegAlloc() - Are you actually
> "allocating" virtual registers, or just using the ones that the
> infrastructure already provides?

Not exactly; the actual register allocation does nothing (i.e.
WebAssemblyPassConfig::createTargetRegisterAllocator() returns nullptr) and
we just use the regular infrastructure virtual registers. However we do run
a custom register coloring pass which reduces the total number of virtual
registers used.

> Is the answer the same for the NVPTX backend?

Yes (at least, they have a null TargetRegisterAllocator too).

> Maybe something like: targetLacksPhysicalRegissters() would be better?
>
Maybe. We actually do have "physical" registers called SP and FP
(returned
by TargetRegisterInfo::getFrameRegister() and used by some default ISel
lowerings and by FrameIndex elimination) but of course they aren't really
physical registers either.
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Hi,

I would actually go the other direction, i.e., stick to physical registers but
with an infinite number.
The rational is that after register allocation we broke all the nice properties
of the pre-alloc virtual registers. For instance, the existing liveness
algorithm cannot be used on those virtual registers. On the other hand, all the
infrastructure we have in place for physical registers would be suited.

Cheers,
Q.
 
> On Dec 9, 2015, at 4:04 PM, Derek Schuff via llvm-dev <llvm-dev at
lists.llvm.org> wrote:
> 
> 
> 
> On Wed, Dec 9, 2015 at 3:02 PM Hal Finkel <hfinkel at anl.gov
<mailto:hfinkel at anl.gov>> wrote:
> ----- Original Message -----
> > From: "Derek Schuff via llvm-dev" <llvm-dev at
lists.llvm.org <mailto:llvm-dev at lists.llvm.org>>
> > To: llvm-dev at lists.llvm.org <mailto:llvm-dev at
lists.llvm.org>
> > Sent: Wednesday, December 9, 2015 4:31:31 PM
> > Subject: [llvm-dev] Allowing virtual registers after register
allocation
> >
> >
> > Hi all,
> > Virtual ISAs such as WebAssembly and NVPTX use infinite virtual
> > register sets instead of traditional phsyical registers.
> > PrologEpilogInserter is run after register allocation and asserts
> > that all virtuals have been allocated but doesn't otherwise depend
> > on this if scavenging is not needed. We'd like to use the
> > target-independent PEI code for WebAssembly, so we're proposing a
> > TargetRegisterInfo hook for targets to indicate that they use
> > virtual registers in this way (currently called
> > usesVirtualRegstersAfterRegAlloc(), other suggestions welcome). The
> > code is at http://reviews.llvm.org/D15394
<http://reviews.llvm.org/D15394> and an example of the
> > intended use for WebAssembly is at http://reviews.llvm.org/D15344
<http://reviews.llvm.org/D15344> .
> >
> 
> I think this makes sense, and generally speaking, I think it will be good
for us to have better support for VM targets without fixed-sized register sets.
> 
> Bikeshedding: usesVirtualRegstersAfterRegAlloc() - Are you actually
"allocating" virtual registers, or just using the ones that the
infrastructure already provides?
> 
> Not exactly; the actual register allocation does nothing (i.e. 
WebAssemblyPassConfig::createTargetRegisterAllocator() returns nullptr) and we
just use the regular infrastructure virtual registers. However we do run a
custom register coloring pass which reduces the total number of virtual
registers used.
>  
> Is the answer the same for the NVPTX backend?
> 
> Yes (at least, they have a null TargetRegisterAllocator too).
>  
> Maybe something like: targetLacksPhysicalRegissters() would be better?
> 
> Maybe. We actually do have "physical" registers called SP and FP
(returned by TargetRegisterInfo::getFrameRegister() and used by some default
ISel lowerings and by FrameIndex elimination) but of course they aren't
really physical registers either.
> 
>  
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
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> On Dec 9, 2015, at 4:13 PM, Quentin Colombet <qcolombet at apple.com>
wrote:
> 
> Hi,
> 
> I would actually go the other direction, i.e., stick to physical registers
but with an infinite number.
> The rational is that after register allocation we broke all the nice
properties of the pre-alloc virtual registers. For instance, the existing
liveness algorithm cannot be used on those virtual registers. On the other hand,
all the infrastructure we have in place for physical registers would be suited.
(modulo supporting a dynamic number of physical registers)
> 
> Cheers,
> Q.
>  
>> On Dec 9, 2015, at 4:04 PM, Derek Schuff via llvm-dev <llvm-dev at
lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
>> 
>> 
>> 
>> On Wed, Dec 9, 2015 at 3:02 PM Hal Finkel <hfinkel at anl.gov
<mailto:hfinkel at anl.gov>> wrote:
>> ----- Original Message -----
>> > From: "Derek Schuff via llvm-dev" <llvm-dev at
lists.llvm.org <mailto:llvm-dev at lists.llvm.org>>
>> > To: llvm-dev at lists.llvm.org <mailto:llvm-dev at
lists.llvm.org>
>> > Sent: Wednesday, December 9, 2015 4:31:31 PM
>> > Subject: [llvm-dev] Allowing virtual registers after register
allocation
>> >
>> >
>> > Hi all,
>> > Virtual ISAs such as WebAssembly and NVPTX use infinite virtual
>> > register sets instead of traditional phsyical registers.
>> > PrologEpilogInserter is run after register allocation and asserts
>> > that all virtuals have been allocated but doesn't otherwise
depend
>> > on this if scavenging is not needed. We'd like to use the
>> > target-independent PEI code for WebAssembly, so we're
proposing a
>> > TargetRegisterInfo hook for targets to indicate that they use
>> > virtual registers in this way (currently called
>> > usesVirtualRegstersAfterRegAlloc(), other suggestions welcome).
The
>> > code is at http://reviews.llvm.org/D15394
<http://reviews.llvm.org/D15394> and an example of the
>> > intended use for WebAssembly is at http://reviews.llvm.org/D15344
<http://reviews.llvm.org/D15344> .
>> >
>> 
>> I think this makes sense, and generally speaking, I think it will be
good for us to have better support for VM targets without fixed-sized register
sets.
>> 
>> Bikeshedding: usesVirtualRegstersAfterRegAlloc() - Are you actually
"allocating" virtual registers, or just using the ones that the
infrastructure already provides?
>> 
>> Not exactly; the actual register allocation does nothing (i.e. 
WebAssemblyPassConfig::createTargetRegisterAllocator() returns nullptr) and we
just use the regular infrastructure virtual registers. However we do run a
custom register coloring pass which reduces the total number of virtual
registers used.
>>  
>> Is the answer the same for the NVPTX backend?
>> 
>> Yes (at least, they have a null TargetRegisterAllocator too).
>>  
>> Maybe something like: targetLacksPhysicalRegissters() would be better?
>> 
>> Maybe. We actually do have "physical" registers called SP and
FP (returned by TargetRegisterInfo::getFrameRegister() and used by some default
ISel lowerings and by FrameIndex elimination) but of course they aren't
really physical registers either.
>> 
>>  
>> _______________________________________________
>> LLVM Developers mailing list
>> llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>
>> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
> 
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