similar to: [LLVMdev] s/ComputeMaskedBits/ComputeKnownBits/g ?

On 13 May 2014 21:27, Rafael Espíndola <rafael.espindola at gmail.com> wrote: > On 13 May 2014 14:33, Jay Foad <jay.foad at gmail.com> wrote: >> I've always found the name ComputeMaskedBits a bit unintuitive, and >> since r154011 it's even worse because there is no masking going on >> whatsoever: >> >>

Today, InstSimplify calls computeKnownBits to try to fold to a constant ONLY if it can't find any other simplifications for an instruction. I think this means if we are able to find an earlier simplification we are LESS aggressive about creating a constant because we won't even look at known bits. This seems surprising to me. Should we be looking at known bits always, or should we remove

SelectionDAG's computeKnownBits has no case for ConstantFP, e.g. Known.ones = cast <ConstantFPSDNode>(Op)->getValueAFP ().bitcastToAPInt (); I can't easily override this in target specific code. Can anyone see an issue with submitting the patch to upstream? Suggestions for an in tree target that could trigger this would be very welcome. Cheers -------------- next part

While looking at optimizations where Souper exploits known bits, I realized that it would be easy to teach Souper to compute known bits. Comparing its results against computeKnownBits() from r246393, it looks like there are some easy (and some not-easy) opportunities for improvement, please see a few examples below. The expressions come from compiling LLVM itself. Happily, this exercise

In tracking down an alignment bug, I think I found a problem in ComputeMaskedBits. But I am not very well versed in this area of LLVM and need some more eyes. This is in the 2.3 release, though it looks like the relevant pieces operate the same way in trunk. I have the following add recurrence: %r849 = select i1 %r848, i64 0, i64 %r847 ; <i64> [#uses=10] %r862 = shl i64 %r849, 3 ;

That's very good. We're clearly further from head of dev than I realised! Thanks for the link. On 19 Jan 2018 18:53, "Friedman, Eli" <efriedma at codeaurora.org> wrote: On 1/19/2018 4:01 AM, Jon Chesterfield via llvm-dev wrote: > SelectionDAG's computeKnownBits has no case for ConstantFP, e.g. > Known.ones = cast <ConstantFPSDNode>(Op)->getValueAFP

David Greene wrote: > Is my analysis correct? If so, is the PHI code the culprit (for not returning > the min of the KnownZero bits) or is the Shl code the culprit (for not paying > attention to the Mask passed in (it right shifts it)? I think your analysis is correct, and that Shl -- and many of the other operations (AShr, LShr, SExt, Add?, Call?) -- should be modified to always

David Greene wrote: > On Friday 18 July 2008 00:36, Nick Lewycky wrote: >> David Greene wrote: >>> Is my analysis correct? If so, is the PHI code the culprit (for not >>> returning the min of the KnownZero bits) or is the Shl code the culprit >>> (for not paying attention to the Mask passed in (it right shifts it)? >> I think your analysis is correct, and

On Saturday 19 July 2008 23:53, Nick Lewycky wrote: > > That said, there are many places that don't respect the Mask. Closer > > reading of the comment leads me to believe the Mask is simply a > > time-saving device, not a correctness-enforcing mechanism. > > That's fine, but if you fix it that way, please audit > InstructionCombiner SimplifyDemandedBits, which

Sorry for being out of touch. Has this been fixed? Evan On Jul 21, 2008, at 1:09 PM, David Greene wrote: > On Saturday 19 July 2008 23:53, Nick Lewycky wrote: > >>> That said, there are many places that don't respect the Mask. >>> Closer >>> reading of the comment leads me to believe the Mask is simply a >>> time-saving device, not a

On Wednesday 20 August 2008 18:08, Evan Cheng wrote: > Sorry for being out of touch. Has this been fixed? I've been trying to test it but have had problems due to the llvm-gcc bootstrap problems I mentioned last week. It's had lots of testing over here so I'll just check it in today. -Dave

On Friday 18 July 2008 00:36, Nick Lewycky wrote: > David Greene wrote: > > Is my analysis correct? If so, is the PHI code the culprit (for not > > returning the min of the KnownZero bits) or is the Shl code the culprit > > (for not paying attention to the Mask passed in (it right shifts it)? > > I think your analysis is correct, and that Shl -- and many of the other

Hi all! I've been tinkering with LLVM's code-base for a few days, hoping to start on one of the ideas mentioned in the "Open Projects" page (I was told 'Improving the current system'/'Miscellaneous Improvements'/5 would be a good start). While I was at it, I also took a stab at finishing up one of the TODOs. I've attached the patch for review. --

Hi As I understand live variable analysis will set the def/kill properties of operands. In that case, is it still needed to set the kill flags when possible during lowering? thanks dz

On the subject of undefined behavior and known bits, as I'm sure some of you are aware, code in ValueTracking.cpp is exploiting poison value rules to get a bit of extra precision in the known bits. These rules fire on examples like the ones below. Do we have a set of rules that clients of known bits need to follow to avoid unsoundness? I remember Nuno and/or David Majnemer saying

Looks like LVI actually does have cases for max and min; would it be better to allow ValueTracking to use range analysis instead? - CL > On Aug 1, 2016, at 8:44 PM, Philip Reames <listmail at philipreames.com> wrote: > >> On 07/29/2016 07:08 PM, Carlos Liam via llvm-dev wrote: >> Hi all, >> >> Say we have this IR: >> >> %1 = icmp slt i16 %x, 0

Hi all, Say we have this IR: %1 = icmp slt i16 %x, 0 %.x = select i1 %1, i16 0, i16 %x This is the canonical form of what is effectively max(x, 0). From what I can tell LLVM has no facilities to determine from this code that %.x >= 0, so (for example) an SExt on %.x will not be converted to a ZExt. I'm interested in seeing what sorts of changes would be needed to recognize this pattern

----- Original Message ----- > From: "David Majnemer" <david.majnemer at gmail.com> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: "Pete Cooper" <peter_cooper at apple.com>, "LLVMdev" <llvmdev at cs.uiuc.edu> > Sent: Wednesday, July 1, 2015 7:17:19 PM > Subject: Re: [LLVMdev] extractelement causes memory access violation

On 06/11/2018 02:33 PM, Friedman, Eli via llvm-dev wrote: > On 6/11/2018 10:06 AM, jingu at codeplay.com via llvm-dev wrote: >> Hello All, >> >> I have met one may-alias case from llvm's alias analysis. The code >> snippet is as following: >> >> char buf[4]; >> >> void test (int idx) { >> char *a = &buf[3 - idx]; >> char *b =

I’m taking a first look at InstCombine performance. I picked up the caching patch and ran a few experiments on one of our larger C++ apps. The size of the *.0.2.internalize.bc no-debug IR is ~ 30M. Here are my observations so far. Interestingly, caching produced a slight but measurable performance degradation of -O3 compile time. InstCombine takes about 35% of total execution time, of which ~20%