Displaying 20 results from an estimated 70 matches similar to: "[LLVMdev] Arguments to setLatencyPolicy calls swapped by accident in ConvergingScheduler::checkResourceLimits?"
2008 Nov 11
3
OT: Polycom Firmware available (by accident?)
Not sure if Polycom is changing their policy or if this is an accident,
but you can actually download SIP 3.1.1 right from their web site.
Anyone looking for firmware should get it now before it disappears.
SIP app and release notes can be found here:
http://www.polycom.com/usa/en/support/voice/soundpoint_ip/soundpoint_ip450.html
-Dave
2017 Oct 11
0
Re: [PATCH] v2v: -i vmx: Refuse to load a disk image by accident.
On Wednesday, 11 October 2017 15:25:26 CEST Richard W.M. Jones wrote:
> If you accidentally point -i vmx at a disk image, it will try to load
> the whole thing into memory and crash. Catch this narrow case and
> print an error.
>
> However don't fail if ‘file’ is not installed or if we don't know what
> the file is.
> ---
> v2v/parse_vmx.ml | 12 ++++++++++++
>
2005 Nov 09
1
accident modified dataset. How can I recovery it?!
I first try these command, it works quite well.
library(lattice)
data(cuckoos)
levnam <- strsplit(levels(cuckoos$species), "\\.")
BUT, i want to try :
levnam <- strsplit(levels(cuckoos$species), ".")
to see the difference.
They maybe I modified the data file, because when I try again, it says:
> data(cuckoos)
Warning message:
data set 'cuckoos' not found in:
2015 Feb 22
1
2 DCs FSMO when one DC die/accident offline
Dear All,
I've read
https://wiki.samba.org/index.php/Flexible_Single-Master_Operations_(FSMO)_roles
Under section
https://wiki.samba.org/index.php/Flexible_Single-Master_Operations_(FSMO)_roles#How_to_handle_situations_where_a_DC_with_FSMO_roles_is_offline
Let assume that DC1 is take all the roles...
It tell that we should put the fail DC1 back online and do the role
transfer...
But below
2017 Oct 11
1
Re: [PATCH] v2v: -i vmx: Refuse to load a disk image by accident.
On Wed, Oct 11, 2017 at 05:17:14PM +0200, Pino Toscano wrote:
> On Wednesday, 11 October 2017 15:25:26 CEST Richard W.M. Jones wrote:
> > If you accidentally point -i vmx at a disk image, it will try to load
> > the whole thing into memory and crash. Catch this narrow case and
> > print an error.
> >
> > However don't fail if ‘file’ is not installed or if we
2017 Oct 11
2
[PATCH] v2v: -i vmx: Refuse to load a disk image by accident.
If you accidentally point -i vmx at a disk image, it will try to load
the whole thing into memory and crash. Catch this narrow case and
print an error.
However don't fail if ‘file’ is not installed or if we don't know what
the file is.
---
v2v/parse_vmx.ml | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/v2v/parse_vmx.ml b/v2v/parse_vmx.ml
index 65d5a0edd..f6c34e2cf
2019 Sep 10
2
MachineScheduler not scheduling for latency
Hi Andy,
Thanks for the explanations. Yes AMDGPU is in-order and has
MicroOpBufferSize = 1.
Re "issue limited" and instruction groups: could it make sense to
disable the generic scheduler's detection of issue limitation on
in-order CPUs, or on CPUs that don't define instruction groups, or
some similar condition? Something like:
--- a/lib/CodeGen/MachineScheduler.cpp
+++
2016 Oct 28
2
mischeduler
Hi,
Regarding the mischeduler, I wonder
// For loops that are acyclic path limited, aggressively schedule for
// latency. This can result in very long dependence chains scheduled in
// sequence, so once every cycle (when CurrMOps == 0), switch to normal
// heuristics.
if (Rem.IsAcyclicLatencyLimited && !Zone->getCurrMOps() &&
tryLatency(TryCand, Cand, *Zone))
2012 Jun 12
2
[LLVMdev] Latency of true depency of store followed by aliased load in ScheduleDAGInstrs
Hi all,
I have a question regarding the latency of the true dependency of a
store followed by an aliased load in ScheduleDAGInstrs. The latency
seems to depend on the store and load being volatile or not as can be
seen in the post-RA-sched debug output of the attached ARM example:
$ llc -O3 -debug-only=post-RA-sched store_load_latency_test.ll
...
SU(2): STRi12 %R2<kill>,
2019 Sep 09
2
Fwd: MachineScheduler not scheduling for latency
Hi,
I'm trying to understand why MachineScheduler does a poor job in
straight line code in cases like the one in the attached debug dump.
This is on AMDGPU, an in-order target, and the problem is that the
IMAGE_SAMPLE instructions have very high (80 cycle) latency, but in
the resulting schedule they are often placed right next to their uses
like this:
1784B %140:vgpr_32 =
2012 Aug 13
1
[LLVMdev] [RFC] Bundling support in the PostRA Scheduler
Hi all,
Thanks for your feed-backs :-)
@Andrew: In fact, I've reused most of the postRA list scheduler code and
the resource priority queue. Every time it needs to move forward, either
because of a res hazard (HazardRec) or an invalid combination of
instructions in the current packet (DFA), it closes the current bundle
and advances to the next cycle. The non-interlocked nature of our
2013 Sep 10
2
[Bug 2151] New: Call to upload_dir() has pflag and printflag swapped
https://bugzilla.mindrot.org/show_bug.cgi?id=2151
Bug ID: 2151
Summary: Call to upload_dir() has pflag and printflag swapped
Product: Portable OpenSSH
Version: -current
Hardware: Other
OS: Other
Status: NEW
Severity: trivial
Priority: P5
Component: sftp
Assignee:
2005 Aug 10
0
swapped mouse buttons and slow down in wine
(Sorry, if this post here is inappropriate. I'm a newbie trying to get
wine working)
I've installed wine20050725 from rpm, and it was running ok. I copied
and installed japanese dictionary app from my real winxp partition to my
fake c drive and patched the reg with the local\software keys from the
xp reg. The program worked (kind of - japanese chars dont display except
when using
2006 Oct 26
2
What has been swapped out?
I have a SunRay server that I am looking at to determine some sizing requirements in my department. The machine has 16G of ram and 10G of swap. Currently, I have about 4G of swap used. I am wondering if dtrace/mdb can be used to find out what lwp/processes have been swapped out?
Any hints?
This message posted from opensolaris.org
2005 Aug 02
2
ethernet interfaces swapped around
One of my systems have two onboard NICs which uses the e100 and e1000
drivers (yes, the interfaces are not the same). This system kickstart
fine with CentOS 3.x. I recently tried to rekick it with CentOS 4.x
but was unsuccessful in doing so. When kicking CentOS 4.1, the
interfaces are swapped around, i.e. eth0 becomes eth1 and eth1 becomes
eth0 (as described at
2004 May 04
2
[Bug 861] Swapped parameters of SSH_FXP_SYMLINK packet of SFTP protocol
http://bugzilla.mindrot.org/show_bug.cgi?id=861
Summary: Swapped parameters of SSH_FXP_SYMLINK packet of SFTP
protocol
Product: Portable OpenSSH
Version: -current
Platform: All
OS/Version: All
Status: NEW
Severity: normal
Priority: P2
Component: sftp-server
AssignedTo:
2012 Dec 27
4
Finding (swapped) repetitions of numbers pairs across two columns
Hi,
I've had this problem for a while and tackled it is a quite dirty way
so I'm wondering is a better solution exists:
If we have two vectors:
v1 = c(0,1,2,3,4)
v2 = c(5,3,2,1,0)
How to remove one instance of the "3,1" / "1,3" double?
At the moment I'm using the following solution, which is quite horrible:
v1 = c(0,1,2,3,4)
v2 = c(5,3,2,1,0)
ft <-
2004 Jul 21
1
Bug#260573: logcheck: ignore.d.paranoid/cron and ignore.d.server/cron swapped
Package: logcheck
Version: 1.2.23
Severity: normal
Hello,
I have:
# /bin/cat ignore.d.server/cron
^\w{3} [ :0-9]{11} [._[:alnum:]-]+ crontab\[[0-9]+\]: \([[:alnum:]-]+\) LIST \([[:alnum:]-]+\)$
^\w{3} [ :0-9]{11} [._[:alnum:]-]+ crontab\[[0-9]+\]: \([[:alnum:]-]+\) REPLACE \([[:alnum:]-]+\)$
and:
# /bin/cat ignore.d.paranoid/cron
^\w{3} [ :0-9]{11} [._[:alnum:]-]+
2018 May 09
2
[MachineScheduler] Question about IssueWidth / NumMicroOps
Hi,
I would like to ask what IssueWidth and NumMicroOps refer to in
MachineScheduler, just to be 100% sure what the intent is.
Are we modeling the decoder phase or the execution stage?
Background:
First of all, there seems to be different meanings of "issue" depending
on which platform you're on:
2018 May 09
0
[MachineScheduler] Question about IssueWidth / NumMicroOps
> On May 9, 2018, at 9:43 AM, Jonas Paulsson <paulsson at linux.vnet.ibm.com> wrote:
>
> Hi,
>
> I would like to ask what IssueWidth and NumMicroOps refer to in MachineScheduler, just to be 100% sure what the intent is.
> Are we modeling the decoder phase or the execution stage?
>
> Background:
>
> First of all, there seems to be different meanings of