Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] Help with Instruction Expansion on Mips"
2012 Jul 20
2
[LLVMdev] Help with Instruction Expansion on Mips
Thanks for your reply.
We are trying to implement a simple Mips-based CPU with just for teaching
purpose, so we delete some instructions which are not commonly used, thus
the task won't be too hard for students. I am responsible for modifying the
compiler so that the compiler won't emit unsupported instructions.
In order to avoid "can not select" error, I am trying to expand
2012 Jul 20
0
[LLVMdev] Help with Instruction Expansion on Mips
why do you want to "ban" certain instructions?
is this for some architectural variant?
the compiler is trying to match patterns from the target independent
part of the code generator.
if you remove instructions, the compiler in many cases will no longer be
able to match certain patterns
and you will get thos "can not select" messages.
On 07/20/2012 03:05 AM, Geraint Yang
2012 Jul 20
0
[LLVMdev] Help with Instruction Expansion on Mips
YOu have to look for which DAG fragments are not being matched.
Then you can create patterns for those using alternate sequences.
When you disablea given instruction, don't just disable it, but also
look at what pattern it was matching.
Then create a patten for that using remaining instructions or in some
cases you might have to call a library function, as in the case of
floating
2009 Jun 19
5
Dail in modem
Hello
I am required to do some thing like Dail in modem .
User will have to call a modem just like we do in dail up connection
....now we need to handle that request and retrieve some parameters
from that send a HTTp request to a web server and then after getting
http response send user a feed back ..
this is a requirement ..
Is it possible ??
what is the way forward ??
please give me a
2010 Aug 17
1
MySQL Connect problem...
Right, I'm baffled.
I have:
exten => s,1,MYSQL(Connect DB1 127.0.0.1 geraint xxx amis2)
exten => s,n,MYSQL(Query NORESULT ${DB1} INSERT\ INTO\ recordings\
(caller_number\,called_number\,date_created\,date_started\,in_use\,server_id)\
VALUES\ (\'${CALLERID(number)}\'\,\'${ARG1}\'\,NOW()\,NOW()\,\'Yes\'\,12))
exten => s,n,MYSQL(Query RESULT1 ${DB1} SELECT\
2008 Oct 06
2
Conneting Asterisk to Swyx pri
Hi all, I've done this a few times with other PBX's but swyx has stumped me!
I'm having some trouble getting Asterisk connected to a Swyx system using a
sangoma A104dx... currently the setup is:
BT <-> Swyx
The above setup works fine... what i'm trying to achieve is
BT & SIP Trunks <-> Asterisk <-> Swyx
I have connected to our BT (2 x ISDN30 UK) with
2008 Jul 07
2
[LLVMdev] Trying to compile llvm-gcc to mips
Hi Julio,
On Mon, Jul 7, 2008 at 6:53 AM, Julio <julio.martin.hidalgo at gmail.com> wrote:
> And one last thing, the problem seems to be related to libcpp. Using only C
> frontend will work?
The problem is with libgcc2, which contains libcalls needed to support
some operations
your processor cant directly do.
>> Actually, I don't need fp, there is any way to disable?
2008 Jul 08
0
[LLVMdev] Trying to compile llvm-gcc to mips
>
> The problem is with libgcc2, which contains libcalls needed to support
> some operations
> your processor cant directly do.
>
Yes, I mix up libgcc2 with libcpp... I have advanced a little, commenting
out the fp functions. Now, it stucks at unwind-dw2.c. MipsISelLowering.cpp
gives the error: Unsupported calling convention.
By the way, I understand that these functions are
2012 Jul 21
2
[LLVMdev] How to disable register allocate optimization?
Hi everyone,
I am trying to expand one instruction into multiple instructions on MIPS.
For example, I try to expand:
sh src, imm(dst)
into:
(1) sb src, imm(dst)
(2) srl reg0, src, 8
(3) sb reg0, (imm+1)(dst)
Here, reg0 are created with createVirtualRegister.
However, instr(2) will not be emitted because reg0 is useless before reg0 is defined in instr(3), it is wrong!
So how to prevent the
2014 Jul 10
2
[LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!!
Hi Andrea Thank you your replying. I do like your letter. Add following to line to MipsISelLowering.cpp. As your words, @llvm.convert.to.fp16 can compile successfully. However, the runtime is not right.
+ setOperationAction(ISD::FP16_TO_FP32, MVT::f32, Expand);+ setOperationAction(ISD::FP32_TO_FP16, MVT::i32, Expand);
Robin
yalong at multicorewareinc.com
From: Andrea Di
2009 Apr 23
2
Asterisk Capacity
Hi Guys,
I have a strong feeling the loads on my servers will be shooting up soon...
anyone got any idea how many calls i can expect to put through a
DL360:
Dual Quad Core 2.33ghz
4gb RAM with 1gb allocated for a ramdisk (call recordings)
This server is recording calls (mixmonitor), codec is gsm (no conversion).
I know there's a lot of other things to consider like AGI scripts and such
2015 May 14
2
[LLVMdev] 3.6.1 -rc1 has been tagged. Testing begins.
> I've disassembled the failing MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4 and compared it to
> the one from the LLVM 3.6.0 test runs. There's nothing obvious. We've removed some useless
> 'addiu $sp,$sp,0', eliminated two (seemingly redundant) sign extends, and the addresses of
> functions+data has changed slightly.
I've investigated further and I'm
2015 May 15
2
[LLVMdev] 3.6.1 -rc1 has been tagged. Testing begins.
> -----Original Message-----
> From: Renato Golin [mailto:renato.golin at linaro.org]
> Sent: 15 May 2015 12:51
> To: Daniel Sanders
> Cc: Tom Stellard; llvmdev at cs.uiuc.edu; cfe-dev at cs.uiuc.edu
> Subject: Re: [LLVMdev] 3.6.1 -rc1 has been tagged. Testing begins.
>
> On 14 May 2015 at 21:39, Daniel Sanders <Daniel.Sanders at imgtec.com>
> wrote:
> >
2018 Sep 06
4
Clang for the PlayStation 2
On Mon, 3 Sep 2018 at 13:31, Tim Northover <t.p.northover at gmail.com> wrote:
> So the next step is to debug where Mips is producing those TruncIntFP
> nodes. There'll be some constraint it's not checking or an unexpected
> node type, probably related to -msingle-float. I'm afraid I'm not sure
> what yet.
>
I'm reasonably sure the function producing that
2009 Apr 23
3
Record in mp3
Somebody knows if I can save files in mp3 with the Record command on Asterisk?
I try to recompile sox to suport mp3 but Asterisk return the folowing message when I use the Record command:
- Executing [*40 at liberado15:15] Record("SIP/1201-083453c8", "/var/spool/asterisk/alarme/alarme-1201-200905121212:mp3") in new stack
??? -- <SIP/1201-083453c8> Playing 'beep'
2014 Apr 29
2
[LLVMdev] MIPS n64 ABI and non-PIC
Has anyone experimented with generating non-PIC for MIPS64 and the n64 ABI?
Currently MipsISelLowering.cpp uses conditions like:
if ((getTargetMachine().getRelocationModel() == Reloc::PIC_) || IsN64) {
}
around any PIC code generation. Is generating non-PIC just untested, or is
it known not to work? I can't find any discussion of it anywhere. I ran
into this when trying to see why
2012 Jul 23
0
[LLVMdev] How to disable register allocate optimization?
It looks like you are not using the right overloaded version of function
BuildMI defined in MachineInstrBuilder.h.
The register operand added to instruction sb should be a use, not a def
operand. So this function should be called,
BuildMI(BB, dl, TII->get(Mips::SB)).addReg(tmpReg1)
instead of
BuildMI(BB, dl, TII->get(Mips::SB), tmpReg1)
On Sat, Jul 21, 2012 at 11:41 AM, Yang Yang
2018 Sep 06
3
Clang for the PlayStation 2
On Thu, 6 Sep 2018, 16:31 Tim Northover, <t.p.northover at gmail.com> wrote:
> > The PS2, for what it's worth, only has an i32 -> f32 instruction, so I
> think there's an impedance mismatch somewhere.
>
> This is also a fairly common situation. If the operation can be
> emulated with a reasonably small number of native instructions you can
> often get LLVM to
2018 Sep 01
3
Clang for the PlayStation 2
Hello,
I'm part of the (sadly fairly small) community of PS2 hackers. The current
cross-toolchain for the PS2 is based on GCC 3.2.3, an outdated and buggy
compiler, which I have personally gotten tired of working with, so I would
like to port Clang as a newer cross-compiler for the PS2.
However, the PS2 has some notable quirks which make this a non-trivial task
for the current compiler. It
2012 Jul 22
1
[LLVMdev] How to calculate the address in TableGen?
Hello everyone,
I would like to ask a question about the address calculation in TableGen.
I replace a definition in MipsInstrInfo.td:
def : Pat<(i32 (extloadi16_a addr:$src)), (LHu addr:$src)>;
to:
def : Pat<(i32 (extloadi16_a addr:$src)), (OR (LBu addr:$src), (SLL (LBu addr:($src+1)), 8))>;
However, it failed to compiled. It seems that ($src+1) is a wrong representation in TableGen.