similar to: [LLVMdev] as: unrecognized option '-meabi=4'

Here is how I do it on x86-64 machine running Ubuntu-11.04: 1. install flex and bison 2. download arm-2011.03 from www.codesourcery.com and add to path (setenv PATH ${PATH}:/home/dskhudia/projects/arm-2011.03/bin) 3. mkdir llvm-gcc-obj; cd llvm-gcc-obj 4. ../llvm-gcc-4.2-2.9.source/configure --target=arm-none-linux-gnueabi --program-prefix=llvm-

Hi Thanks your info On 7/8/11, James Molloy <james.molloy at arm.com> wrote: > Hi, > > > > It sounds like you're using an incorrect version of binutils (one that > targets x86 instead of ARM, for example). > > > > You require an ARM-targetting assembler and linker. > > > > James > > > > From: llvmdev-bounces at cs.uiuc.edu

Hi I am trying to cross compile llvm-gcc front for ARM target Followed below steps #../llvm-gcc-4.2-2.9.source/configure --program-prefix=llvm- --enable-llvm=/home/yuvraj/llvm/llvm-2.9 --enable-languages=c,c++ --target=arm-none-linux-gnueabi # make I am getting some kind of linker errors /opt/arm-2010.09/bin/arm-none-linux-gnueabi-ld: cannot find crtn.o: No such file or directory @ final

My source directory wasn't correct but now I have a correct test directory structure. $ls -1 ~/tmp/speccpu2000/benchspec/CINT2000/164.gzip/ data docs exe result run Spec src version I reconfigured the llvm with ../configure --prefix=/home/dskhudia/tmp/llvm-install --with-llvmgccdir=/home/dskhudia/tmp/llvm-install --with-externals=/home/dskhudia/tmp Now I can execute the make -C 164.gzip but

Hi Duncan, Do you have sources also in the $LLVM_SRC_ROOT/projects/test-suite/External/SPEC/CINT2000/164.gzip? The following is content of above directory in my case. I have copied the CINT2000 sources in this directory manually. $ls -1 $LLVM_SRC_ROOT/projects/test-suite/External/SPEC/CINT2000/164.gzip 164.gzip.reference_output 164.gzip.reference_output.small compile_info compile_parms

I'm not sure I understand the poison/undef/UB distinctions. But on this example: define i32 @func(i1 zeroext %b, i32 %x, i32 %y) { > entry: > %adds = add nsw i32 %x, %y > %addu = add nuw i32 %x, %y > %cond = select i1 %b, i32 %adds, i32 %addu > ret i32 %cond > } It is important to not propagate the nsw/nuw between the two SCEV expressions (which unification would

Does it make a difference if you give the "-target" option to clang? $ clang -target mips-linux-gnu ch8_3.cpp -o ch8_3.bc -emit-llvm -c The .s file generated this way looks quite different from the one in your email. On Tue, Feb 19, 2013 at 5:06 PM, Jonathan <gamma_chen at yahoo.com.tw> wrote: > I didn't have Mips board. I compile as the commands and check the asm >

I didn't have Mips board. I compile as the commands and check the asm output as below. 1. Question: The distance of caller arg[4] and arg[5] is 4 bytes. But the the callee get every arg[] by 8 bytes offset (arg_ptr1+8 or arg_ptr2+8). I assume the #BB#4 and #BB#5 are the arg_ptr which is the pointer to access the stack arguments. 2. Question: Stack memory 28($sp) has no initial value. If

Ok. To go back to the original issue, would it be meaningful to add a SCEVUMax(0, BTC) on the final BTC computed by SCEV? So that it does not use "negative values"? On Wed, Aug 15, 2018 at 2:40 PM Friedman, Eli <efriedma at codeaurora.org> wrote: > On 8/15/2018 2:27 PM, Alexandre Isoard wrote: > > I'm not sure I understand the poison/undef/UB distinctions. >

Hi, Does anyone know how to fix the following error? I am compiling 254.gap as a part of test-suite with the following command in llvm-2.9/obj/projects/test-suite/External/SPEC/CINT2000. make -C 254.gap /home/dskhudia/tmp/llvm-2.9/obj/projects/test-suite/../../../projects/test-suite/RunToolSafely.sh 500 /home/dskhudia/tmp/llvm-2.9/obj/Release/bin/opt -std-compile-opts

I was told that I can use clang + llvm to get MIPS instructions on my x86 machine. I did following command and got error below. Does anyone have any idea ? or can someone suggest me how to get MIPS instructions easily from llvm. clang -ccc-host-triple mips-unknown-linux -ccc-clang-archs mips helllo.c clang: warning: unknown platform, assuming -mfloat-abi=soft '+' is not a recognized

Hi, I am using first time opensuse,please help me to how to install wine software in open suse 11.0 and how to configure it , please guide me Please give me any update wine software link for suse Regards, Yuvaraj -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://www.winehq.org/pipermail/wine-users/attachments/20100514/ae0219e1/attachment.htm>

Tim, yes, I am on a very unique architecture, just about every instruction has a signed and unsigned operation (ie, adds, addu, subs, subu, etc...) and we handle signed and unsigned somewhat differently. I'm not sure how we'll handle this yet, very worst case scenario is to propagate the info from clang but that's not ideal, obviously. Thanks for all the replies! On Wed, Feb 15,

Hi Sam, I am not a MIPS expert by any means, so YMMV, but: MIPS addu only differs to "add" in its (non)setting of the overflow flag. Because LLVM doesn't provide a way via the IR to access the overflow flag, a special notation isn't required in the IR to distinguish the two operations. Do you have another example? Cheers, James -----Original Message----- From:

> On Sep 13, 2017, at 9:03 PM, jin chuan see via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi All, > > Thanks for the reply. I managed to identify and fixed a few errors in my implementation. > > However, there are a few errors that i am not sure what is it indicating. > For starters, i think i should explain what i am trying to achieve. > > I am

Hi all, When compiling some programs using the Mips backend i'm getting this assert message on lib/CodeGen/LiveInterval.cpp:227: "Range is not entirely in interval!" I don't know yet if it's something that is missing on the backend code or why the range to be removed it outside the interval, does anyone have any clue? A more detailed output is attached. The program i tried

Hi all. if there is limitation for the registers to be used together in an instruction, should i try to change it in the register allocation pass or should i try it somewhere else?? example. lets say we have to add 2 registers addu rx ,ry ,rz there is a limitation that says that the two regs that will be added they can not have the same mod4 so we can add r1 , r2 but cannot add r1,r5.

Thanks for the replies guys but I think I should have phrased my question better... looking at the Mips backend there are machine instructions that operate on signed and unsigned data, such as add and addu. And like Mips, I need to specify unsigned specific instructions, so how do these get chosen between if the LLVM IR does not carry type data? A very general point in the right direction is all i

Hi James, So does this mean if the instruction could set the overflow flag, the instruction should not have [(set ... )] in it's pattern, i see this is the difference in instruction description for the mips case. I'm wondering how llvm knows when to use certain compare instructions such as SETNE or SETUNE? And for sign or zero extending loads? I can see the PatFrags described and the

Hi Bill Wendling. I am trying to get a hexcode as shown below for mips processor using llvm Disassembly of section .text: 00000000 <main>: 0: 27bdffe8 addiu sp,sp,-24 4: afbe0010 sw s8,16(sp) 8: 03a0f021 move s8,sp c: 24020004 li v0,4 10: afc20008 sw v0,8(s8) 14: 24020005 li v0,5 18: afc20004