similar to: [LLVMdev] [PATCH] Spill Comments

On Sep 11, 2009, at 3:31 PM, David Greene wrote: > Attached is a patch to print asm comments for spill information. > We've discussed the mechanisms before but I wanted to run the > patch by everyone before I start to commit pieces. Some thoughts: The general approach to enhancing CreateStackObject and adding MachineInstr::AsmPrinterFlags seems fine to me! The testcase should

On Monday 14 September 2009 12:32, Chris Lattner wrote: > On Sep 11, 2009, at 3:31 PM, David Greene wrote: > > Attached is a patch to print asm comments for spill information. > > We've discussed the mechanisms before but I wanted to run the > > patch by everyone before I start to commit pieces. > > Some thoughts: > > The general approach to enhancing

Hi Dave, On Sep 11, 2009, at 3:31 PM, David Greene wrote: > Attached is a patch to print asm comments for spill information. > We've discussed the mechanisms before but I wanted to run the > patch by everyone before I start to commit pieces. The Offset->FrameIndex mapping seems rather heavy-weight, as any expense is incurred even when AsmVerbose is off. Would it be possible to

On Monday 14 September 2009 12:22, Dan Gohman wrote: > Hi Dave, > > On Sep 11, 2009, at 3:31 PM, David Greene wrote: > > Attached is a patch to print asm comments for spill information. > > We've discussed the mechanisms before but I wanted to run the > > patch by everyone before I start to commit pieces. > > The Offset->FrameIndex mapping seems rather

Hi, Is it possible to add a spill code (a pair of store /load ) to the machinecode in a pass before the instruction emitter? If so, how can I calculate the address (offset to the sp) for the spill store/load instructions? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

On Monday 14 September 2009 12:32, David Greene wrote: > > The Offset->FrameIndex mapping seems rather heavy-weight, as > > any expense is incurred even when AsmVerbose is off. Would it > > be possible to use MachineMemOperands instead? In theory, > > they should already be preserving the needed information. If > > they're not sufficient, could they be

On Sep 14, 2009, at 10:34 AM, David Greene wrote: > On Monday 14 September 2009 12:32, David Greene wrote: > > >>> The Offset->FrameIndex mapping seems rather heavy-weight, as >>> >>> any expense is incurred even when AsmVerbose is off. Would it >>> >>> be possible to use MachineMemOperands instead? In theory, >>> >>>

On Wed, Dec 9, 2015 at 3:02 PM Hal Finkel <hfinkel at anl.gov> wrote: > ----- Original Message ----- > > From: "Derek Schuff via llvm-dev" <llvm-dev at lists.llvm.org> > > To: llvm-dev at lists.llvm.org > > Sent: Wednesday, December 9, 2015 4:31:31 PM > > Subject: [llvm-dev] Allowing virtual registers after register allocation > > > >

Ok, I've had time to track this down a little bit more and I seem to have found another case where it fails. This is occurring during Schedulur->EmitSchedule() in SelectionDAGISel.cpp:695. The problem seems to be that somehow the CopyToReg part of the switch statement in ScheduleDAG::EmitNode has a FrameIndex as its second operand. This is especially problematic because the code is either

On Jan 27, 2009, at 3:54 PM, Villmow, Micah wrote: > Ok, I've had time to track this down a little bit more and I seem to > have found another case where it fails. This is occurring during > Schedulur->EmitSchedule() in SelectionDAGISel.cpp:695. The problem > seems > to be that somehow the CopyToReg part of the switch statement in > ScheduleDAG::EmitNode has a

On 10/10/11 19:19, Jakob Stoklund Olesen wrote: > On Oct 10, 2011, at 10:26 AM, Richard Osborne wrote: >> I'm investigating a bug associated with debug information that manifests >> itself in the XCore backend (PR11105). I'd like to understand what the >> expected behavior of eliminateFrameIndex() is when it is called on a >> dbg_value machine instruction. >

On 03/01/2013 10:42 PM, Hal Finkel wrote: > > As some of the llvm modules are in active development, for example MC > Layer, we want to return code to community repository first, so that > it will be easy to keep pace with llvm main tree. > I think this makes sense; but my impression is that the community will want a clear idea that this will be maintained and improved for the

On Fri, Mar 1, 2013 at 4:52 PM, Jiong Wang <jiwang at tilera.com> wrote: > On 03/01/2013 10:42 PM, Hal Finkel wrote: >> >> >> As some of the llvm modules are in active development, for example MC >> Layer, we want to return code to community repository first, so that >> it will be easy to keep pace with llvm main tree. >> I think this makes sense; but

> On Dec 9, 2015, at 4:13 PM, Quentin Colombet <qcolombet at apple.com> wrote: > > Hi, > > I would actually go the other direction, i.e., stick to physical registers but with an infinite number. > The rational is that after register allocation we broke all the nice properties of the pre-alloc virtual registers. For instance, the existing liveness algorithm cannot be used

I'm investigating a bug associated with debug information that manifests itself in the XCore backend (PR11105). I'd like to understand what the expected behavior of eliminateFrameIndex() is when it is called on a dbg_value machine instruction. Currently the XCore target replaces the frame index with the frame register and sets the next operand to the byte offset from the frame

Micah, Thanks for your help. I will study on that code. Justin, Sorry for my misleading word. Local memory in OpenCL is the same as share memory in CUDA. What I mean is share memory, so MachineFrameInfo is not suitable to me. And I need codegen data, so FunctionPass is also not suitable. Anyway, thanks for the suggestion. Antony 2013/8/5 Justin Holewinski <justin.holewinski at

On Oct 10, 2011, at 10:26 AM, Richard Osborne wrote: > I'm investigating a bug associated with debug information that manifests > itself in the XCore backend (PR11105). I'd like to understand what the > expected behavior of eliminateFrameIndex() is when it is called on a > dbg_value machine instruction. That is up to the target. The TII::emitFrameIndexDebugValue() hook is

Hi all, Virtual ISAs such as WebAssembly and NVPTX use infinite virtual register sets instead of traditional phsyical registers. PrologEpilogInserter is run after register allocation and asserts that all virtuals have been allocated but doesn't otherwise depend on this if scavenging is not needed. We'd like to use the target-independent PEI code for WebAssembly, so we're proposing a

On 03/02/2013 04:50 AM, Dmitri Gribenko wrote: > You also need tests for Clang bits, too. > > Mechanical issues: > > +/// getTileRegisterNumbering - Given the enum value for some register, > +/// return the number that it corresponds to. > > Please don't duplicate function and class name in comments. Existing > code does this, but current style guidelines advise not

Micah, As you expected, I am trying to create local memory but in the NVPTX backend. It's really not convenient that I can't create local memory in runOnMachineFunction. Hmm.... Since I should do it at doInitialization stage, I also need to do some tricks in global variable and AsmPrinter to resize it. Did you use the similar way? Antony 2013/8/5 Micah Villmow <micah.villmow at