similar to: [LLVMdev] Dump instruction list prior register allocation

Dear friends, I have been using the SUIF Machine infrastructure for sometime. Some optimizations are available without using a target machine, i.e. at the SUIFvm level. At this level you have "infinite" registers. Other optimizations, including analyses as for profiling require the use of a target library, a complete backend. It is very sad, that they have discontinued their MIPS

Nikolaos Kavvadias wrote: > Dear friends, > > I have been using the SUIF Machine infrastructure for sometime. Some > optimizations are available without using a target machine, i.e. at the > SUIFvm level. At this level you have "infinite" registers. Other > optimizations, including analyses as for profiling require the use of a > target library, a complete

On Thu, Jan 20, 2005 at 02:38:39AM -0800, John Cortes wrote: > I tried including the SUIFvm header files and got more errors than I > bargained for. Looks like it hasn't been updated to be portable. I > need some help in getting these suifvm references into the code I'm > writing. While I understand that your current goal is translating LLVM -> SUIF, it seems that

On Tue, 18 Jan 2005, John Cortes wrote: >> Can you say a little bit about MACH-SUIF? With a brief google search, I >> didn't turn up anything that described the architecture. Is it a RISC-like >> machine with 32-bit instruction words? >> > > It's another VM representation. I haven't really gotten to know the nitty > gritty of the language so

Chris Lattner wrote: > On Tue, 18 Jan 2005, John Cortes wrote: > >> Hi Chris, > > > Hi! I'm CC'ing the llvmdev list for the benefit of others. > >> Since I see you're very involved in LLVM, I need a little guidance on >> getting from C to MACH-SUIF. >> >> I've been given the task of using LLVM to translate C code to another

Chris Lattner wrote: > On Tue, 18 Jan 2005, John Cortes wrote: > >>> Can you say a little bit about MACH-SUIF? With a brief google >>> search, I didn't turn up anything that described the architecture. >>> Is it a RISC-like machine with 32-bit instruction words? >>> >> >> It's another VM representation. I haven't really gotten

Hi, On Sat, Oct 31, 2009 at 11:42 AM, Nan Zhu <zhunansjtu at gmail.com> wrote: > Hi,all > > I tried to run the generated whole-program bitcode of BIND,but I got some > information: > > 0   lli             0x0000000000feda16 > 1   lli             0x0000000000fed88f > 2   libpthread.so.0 0x0000003df340eee0 > 3   libc.so.6       0x0000003df28332f5 gsignal + 53 >

Mahadevan R wrote: > Hi, > > On Sat, Oct 31, 2009 at 11:42 AM, Nan Zhu <zhunansjtu at gmail.com> wrote: >> Hi,all >> >> I tried to run the generated whole-program bitcode of BIND,but I got some >> information: >> >> 0 lli 0x0000000000feda16 >> 1 lli 0x0000000000fed88f >> 2 libpthread.so.0

Hi Jan, > I've been looking into how to make llvm bitcode files smaller. There is one > simple change that appears to shrink linked bitcode files by about 15%. See > this spreadsheet for some rough data: > > https://docs.google.com/spreadsheet/ccc?key=0AjRrJHQc4_bddEtJdjdIek5fMDdIdFFIZldZXzdWa0E the improvement is wonderful! ... > In any case, the patch is attached if

Hi I have written a pass which creates some scheduling information. Its called MParSchedule. This pass works with opt. But when feeding it my experimental backend it seems to loose instructions and fails to work. I am loading this stuff as .so libraries under linux and i am using the amd64 version with a self compiled llvm-gcc. With this call it works: opt

Ocassionally when I'm searching using Omega I get: "DatabaseCorruptError: Cannot open tables at consistent revisions" If I click reload it's all ok, is this the database being updated?, is there a way to avoid the message? Frank

Hi,all I tried to run the generated whole-program bitcode of BIND,but I got some information: 0 lli 0x0000000000feda16 1 lli 0x0000000000fed88f 2 libpthread.so.0 0x0000003df340eee0 3 libc.so.6 0x0000003df28332f5 gsignal + 53 4 libc.so.6 0x0000003df2834b20 abort + 384 5 libc.so.6 0x0000003df282c2fa __assert_fail + 234 6 lli

perhaps one should ask why a compiler has not compiled itself to binary and requires a 3rd party compiler to exist. Someone please send me lli that works on a pxa270 (which has never been tested?) and make sure it runs in PocketPC(win) so I dont have to wait another 20 hours to compile a damned compiler. On 7/24/07, nkavv at physics.auth.gr <nkavv at physics.auth.gr> wrote: > >

On Tue, 18 Jan 2005, John Cortes wrote: > Hi Chris, Hi! I'm CC'ing the llvmdev list for the benefit of others. > Since I see you're very involved in LLVM, I need a little guidance on getting > from C to MACH-SUIF. > > I've been given the task of using LLVM to translate C code to another VM > architecture known as MACH-SUIF. For this architecture, i don't

Hi all, I've been looking into how to make llvm bitcode files smaller. There is one simple change that appears to shrink linked bitcode files by about 15%. See this spreadsheet for some rough data: https://docs.google.com/spreadsheet/ccc?key=0AjRrJHQc4_bddEtJdjdIek5fMDdIdFFIZldZXzdWa0E The change is in how operand ids are encoded in bitcode files. Rather than use an "absolute

https://bugzilla.netfilter.org/bugzilla/show_bug.cgi?id=521 kaber@trash.net changed: What |Removed |Added ---------------------------------------------------------------------------- Status|NEW |RESOLVED Resolution| |FIXED ------- Additional Comments From kaber@trash.net 2007-01-11

Hi Nikolaos, Following commands work great for me. $ clang -S -emit-llvm -target nvptx -x cl -include clc/clctypes.h ../data-types/scalar.cl $ llc -mcpu=sm_30 scalar.s You can follow Justin's blog [1]. It helped me a lot to understand where to start. [1] http://jholewinski.org/blog/llvm-3-0-ptx-backend/ Best, Ankur On Mon, Feb 4, 2013 at 11:40 PM, Justin Holewinski < justin.holewinski

Hello, I have the RedCloth 4.x gem installed on a new machine. I used to use the redcloth command line tool/executable ocassionally. Can anyone clarify if it''s still part of the RedCloth 4.x gem series? Thanks. PS: I checked the sources. And the executable source resides in bin [1]. However, checking the Rakefile that generates the gem package I can''t find any

Hi, I am trying to read in records from an old main frame file. Each record is 640 bytes. I had some success using the following statement: iconv(readChar(con, nchars=640, useBytes = TRUE),from="IBM037",to="",sub="#") What I have found, however, is that ocassionally a record will contain a Null halfway through, which causes readChar() not to read the rest of the

Hi Dave, --- David Greene <greened at obbligato.org> wrote: > Roman Levenstein wrote: > > > Yes, the SUIF allocator (or at least one of them) implements the > > Smith/Ramsey/Holloway algorithm. This is what I understand by > looking > > at the coloring reggister allocator code in the SUIF distribution. > The > > SUIF code of this allocator is not very