similar to: "Build Experimental Targets not working"

Displaying 20 results from an estimated 1000 matches similar to: ""Build Experimental Targets not working""

2019 Jan 30
2
[8.0.0 Release] rc1 has been tagged
Alex, ping? There was a thread about moving Risc-V out of experimental but I think it didn't go anywhere? Separately, do the listed patches sound okay for merging? Thanks, Hans On Fri, Jan 25, 2019 at 4:40 PM Bruce Hoult <brucehoult at sifive.com> wrote: > > In https://llvm.org/svn/llvm-project/llvm/branches/release_80 I find > that RISCV is still in
2018 Mar 02
2
Segmentation fault when using llc to target riscv.
I am using LLVM version 4.0.1 Running `llc -march=riscv64 math.ll` returns: #0 0x0000000000fed7d1 (llc+0xfed7d1) #1 0x0000000000fec559 (llc+0xfec559) #2 0x0000000000fec8d9 (llc+0xfec8d9) #3 0x00007f22c044e5e0 __restore_rt (/lib64/libpthread.so.0+0xf5e0) #4 0x0000000000d7faf3 (llc+0xd7faf3) #5 0x0000000000cd4b88 (llc+0xcd4b88) #6 0x0000000000cd530c (llc+0xcd530c) #7 0x00000000006858c3
2018 May 22
1
LLVM tool-chain for RISC-V
Is there a full LLVM toolchain that can produce an object file runnable by spike (the risc-v ISA simulator)? I found some toolchains but from what I can tell, they still require that you invoke gcc to the assembly and linkage. Is there a reason llvm-as and lld haven't been ported or is it just because nobody has done it yet? -- Ahmed Samara PhD Student Computer Engineering --------------
2018 Jan 29
2
How to use tablegen to describe branches where the status register is implicitly set?
I'm working on writing a backend for a processor that only has one Branch instruction, a BRnzp, where it branches on a status register (NZP: Negative, Zero, Positive) based on what the result of the last arithmetic operation was. It's implicitly set, nowhere in userspace. Basically, it follows the format of: ADD .... BR 010 ... (Branches if the result of the ADD was zero). Unconditional
2018 Apr 09
1
Why does Clang use GCCBuiltInFunctions? How can intrinsics that don't depend on GCC be added?
http://llvm.org/doxygen/namespacellvm_1_1Intrinsic.html#a441f366e90feb68d310546c271bcd31e I noticed that there are a lot of intrinsice in `include/llvm/IR/Intrinsics*.td` that reference GCCBultIn, and looking at the functions they're referencing it seems to be based on things already built into GCC. Why is it done this way instead of just building them from scratch (or importing the
2018 Jan 16
2
Why do backend pass definitions call a seperate function just to call the constructor?
Things like this in `lib/Target/ARM/ARMExpandPseudoInsts.cpp` FunctionPass *llvm::createARMExpandPseudoPass() { > return new ARMExpandPseudo(); > } And other functions have basically the same style. What's the point of doing it this way instead of just calling `new ARMExpandPseudo` in any place that you would have called this function? -- Ahmed Samara M.S. Computer Engineering
2015 Mar 09
2
[LLVMdev] Out of tree targets
Hey all, Quick query on out of tree target support - at present I can drop a folder Foo into <llvm>/lib/Target/Foo and use the CMake option LLVM_EXPERIMENTAL_TARGETS_TO_BUILD to pick up my target. The issue is that I still need to patch the one LLVMBuild.txt file in <llvm>/lib/Target with; |iff --git a/lib/Target/LLVMBuild.txt b/lib/Target/LLVMBuild.txt index 4112046..6e42cbe
2018 Jan 16
0
Why do backend pass definitions call a seperate function just to call the constructor?
On 16 January 2018 at 20:40, Ahmed Samara via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Things like this in `lib/Target/ARM/ARMExpandPseudoInsts.cpp` > >> FunctionPass *llvm::createARMExpandPseudoPass() { >> return new ARMExpandPseudo(); >> } > > And other functions have basically the same style. > > What's the point of doing it this way instead
2015 Mar 09
2
[LLVMdev] Out of tree targets
I believe we'd need LLVMBuild.txt even in autoconf build - for bunch of autogenerated stuff, e.g. list of all asmprinters / asmparsers / InitializeAllTargetInfos, etc., since targets are not autoregistered anymore. On Mon, Mar 9, 2015 at 7:20 PM, Eric Christopher <echristo at gmail.com> wrote: > Hi Neil, > > Weird, I'd think the cmake build should probably do something
2018 Sep 27
4
How to cross-compile for ARC in clang?
Hello everyone, I'm trying to compile my test.cpp for ARC, using this guide https://clang.llvm.org/docs/CrossCompilation.html. I've built my LLVM+CLANG with ARC, ARM and X86. clang -target arc -S test.cpp Gives me: error: unknown target triple 'arc', please use -triple or -arch clang -targer arm works fine Is there any way to compile for ARC? -------------- next part
2019 Mar 21
2
A question about "make check-all"
Hello, I have successfully build the newest llvm from git source, and I would like to do some experiments on target AVR. Does "make check-all" cover AVR? All I need some extra steps to test AVR? I have neither AVR simulator nor real AVR board connected. Thank you. -------------- next part -------------- An HTML attachment was scrubbed... URL:
2019 Jan 24
14
[8.0.0 Release] rc1 has been tagged
Dear testers, 8.0.0-rc1 was just tagged (from the branch at r351980). It took a little longer than planned, but it's looking good. Please run the test script, share your results, and upload binaries. I'll get the source tarballs and docs published as soon as possible, and binaries as they become available. Thanks, Hans
2018 Nov 27
3
Have LLD and Clang in their correct locations, but still can't generate project files for LLVM
I think most people are using ninja to do the build. You can still use the Visual Studio generator for the IDE experience while doing build from ninja. I know there are a couple of people who build from inside of Visual Studio, but it's a pretty small number, and I don't think they are targeting WebAssembly. On Tue, Nov 27, 2018 at 12:46 PM Osman Zakir via llvm-dev < llvm-dev at
2019 Sep 11
0
[vhost:linux-next 16/17] include/linux/page_reporting.h:9:34: note: in expansion of macro 'pageblock_order'
tree: https://kernel.googlesource.com/pub/scm/linux/kernel/git/mst/vhost.git linux-next head: 39c226b6b576b23d6d558331e6895f02b0892555 commit: 990055c63121520ad29deca72b1167b392563ddd [16/17] virtio-balloon: Add support for providing unused page reports to host config: riscv-allmodconfig (attached as .config) compiler: riscv64-linux-gcc (GCC) 7.4.0 reproduce: wget
2020 Apr 02
2
lli cannot execute the bc file for RISCV, Unable to find target for this triple
*llvm-project version:dd8a2013dc1804be1b7d9cffacad2e984300bd22* *Instructons to build LLVM+clang:* ``` cmake -G Ninja -DCMAKE_INSTALL_PREFIX=/home/llvm/workspace/llvm/llvm-project/llvm_install -DCMAKE_BUILD_TYPE="Release" -DDEFAULT_SYSROOT="/home/llvm/workspace/riscv/riscv-tc-20200220/bin/riscv32-unknown-elf"
2020 Mar 27
3
llvm-objdump cannot recognize mul&mulh RISC-V M Instructions
I am using llvm-project compiling risc-v programs. llvm-project version:dd8a2013dc1804be1b7d9cffacad2e984300bd22 Instructons to build LLVM+clang: ``` cmake -G Ninja -DCMAKE_INSTALL_PREFIX=/home/llvm/workspace/llvm/llvm-project/llvm_install -DCMAKE_BUILD_TYPE="Release" -DDEFAULT_SYSROOT="/home/llvm/workspace/riscv/riscv-tc-20200220/bin/riscv32-unknown-elf"
2018 Nov 28
2
Have LLD and Clang in their correct locations, but still can't generate project files for LLVM
@Jonathan Goodwin: Do I have to use a flag to tell it where the LLVM include files are? And would it be easier to do that in the CMake GUI? Please tell me how you had it find the include files if that may help me. ________________________________ From: Jonathan Goodwin <jondgoodwin at gmail.com> Sent: Wednesday, November 28, 2018 6:24 AM To: zturner at google.com Cc: Osman Zakir; llvm-dev
2019 Sep 25
2
Help with RISCV and QEMU in llvm testsuite lit testing
Hi, I am not sure if this is the right forum. Please direct me to the appropriate place if it isn't so. Please keep in CC as i am not subscribed to this mailing list. I am trying to test riscv llvm tools in QEMU using llvm testsuite. As a trial i am trying only the Single Source C Regression folder. The steps that i took are : ]$ cmake -DCMAKE_C_COMPILER=/opt/riscv-tools/bin/clang
2017 Dec 21
2
How to implement lowerReturn for poring GlobalISel to RISCV?
Hi LLVM developers, Thank Daniel Sanders, Aditya Nandakumar and Justin Bogner's Tutorial[1]: Head First into GlobalISel about how to port, and Aditya took BPF target as a simple instance: bool BPFCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,                                   const Value *Val, unsigned VReg) const {   assert(!Val == !VReg && "Return value
2019 Aug 14
3
[RFC][RISCV] Selection of complex codegen patterns into RISCV bit manipulation instructions
Hi all, I'm currently working on the implementation for LLVM of the RISCV Bit Manipulation ISA extension described by Clifford Wolf in the following presentation: https://content.riscv.org/wp-content/uploads/2019/06/17.10-b_wolf.pdf and the following document: https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-0.90.pdf The aim is to provide the intrinsic functions to the user in