similar to: computeKnownBits doesn't handle ISD::ConstantFP

Displaying 20 results from an estimated 500 matches similar to: "computeKnownBits doesn't handle ISD::ConstantFP"

2018 Jan 19
0
computeKnownBits doesn't handle ISD::ConstantFP
That's very good. We're clearly further from head of dev than I realised! Thanks for the link. On 19 Jan 2018 18:53, "Friedman, Eli" <efriedma at codeaurora.org> wrote: On 1/19/2018 4:01 AM, Jon Chesterfield via llvm-dev wrote: > SelectionDAG's computeKnownBits has no case for ConstantFP, e.g. > Known.ones = cast <ConstantFPSDNode>(Op)->getValueAFP
2012 Feb 10
1
[LLVMdev] Prevent DAG combiner from changing "store ConstFP, addr" to integer store
This code lives in DAGCombiner.cpp: ------------- // Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr' if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Value)) { // NOTE: If the original store is volatile, this transform must not increase // the number of stores. For example, on x86-32 an f64 can be stored in one // processor operation but
2014 May 05
3
[LLVMdev] get unsigned integer pattern for ConstantFP
What is the proper way to get the bit pattern associated with a ConstantFP? The 32 bit pattern if MVT::f32 or pair of 32 bit patterns with MVT::f64 ? Tia. Reed
2009 Mar 02
0
[LLVMdev] Please review the 2.5 release notes
> Please review the 2.5 release notes here: http://llvm.org/docs/ReleaseNotes.html The description of nocapture is a bit funny: "... pointer arguments to functions that access through but do not return the pointer in a data structure that out lives the call" I think it needs s/return/retain/ and s/out lives/outlives/ > In addition, many APIs have changed in this release. Some
2018 Jun 07
2
Matching ConstantFPSDNode tablegen
I'm trying to match a ConstantFPSDNode == 0 in dag pattern for tablegen but am having some issues. So LLVM doesn't seem to accept a floating point constant literal match like: %v = call <4 x float> @foo(i32 15, float %s, float 0.0, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0) ret <4 x float> %v def : XXXPat<(v4f32 (int_foo i32:$mask, f32:$s, 0,
2014 May 13
4
[LLVMdev] s/ComputeMaskedBits/ComputeKnownBits/g ?
I've always found the name ComputeMaskedBits a bit unintuitive, and since r154011 it's even worse because there is no masking going on whatsoever: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20120402/140280.html Is there any appetite for a global rename to ComputeKnownBits? Or any other better names? Thanks, Jay.
2014 May 14
3
[LLVMdev] s/ComputeMaskedBits/ComputeKnownBits/g ?
On 13 May 2014 21:27, Rafael Espíndola <rafael.espindola at gmail.com> wrote: > On 13 May 2014 14:33, Jay Foad <jay.foad at gmail.com> wrote: >> I've always found the name ComputeMaskedBits a bit unintuitive, and >> since r154011 it's even worse because there is no masking going on >> whatsoever: >> >>
2014 Aug 07
3
[LLVMdev] Proposal: Add a target lowering hook to state that target supports floating point exception behavior.
Hello All, the patch below adds a target lowering hook to state that the target supports (or not) floating point exception behavior. The patch is small and contains one possible use for the hook (folding potentially exception raising fp operations). Any comments? Thanks Pedro -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: opensource1.txt
2017 Apr 17
2
InstSimplify and computeKnownBits
Today, InstSimplify calls computeKnownBits to try to fold to a constant ONLY if it can't find any other simplifications for an instruction. I think this means if we are able to find an earlier simplification we are LESS aggressive about creating a constant because we won't even look at known bits. This seems surprising to me. Should we be looking at known bits always, or should we remove
2014 Aug 08
3
[LLVMdev] Proposal: Add a target lowering hook to state that target supports floating point exception behavior.
I assume you meant to ask for ports that *don’t* support floating point exceptions. To my knowledge, neither R600 nor NVPTX support floating point exceptions. —Owen > On Aug 8, 2014, at 2:41 PM, Eric Christopher <echristo at gmail.com> wrote: > > There's a lot of cut and paste in those routines. Can you do something > to unify it a bit? Also, do we have any ports that
2011 Oct 10
2
[LLVMdev] Adding fixups and relocations late in code generation
Gang, I'm tasked with direct object generation for Mips and am trying to not hack the code. I how exactly does one set an expression to be PC relative and if the compiler can resolve it, not produce a relocation? In our case, the backend produces an expression for the branch which is the target label. I make a call from the .td for the branch instruction which calls a routine in
2015 Aug 10
2
Bug or expected behavior of APFloat class?
Hi, I've been playing around with the APFloat class lately and I came across behavior I was not expecting based on reading the implementation comments and I'm wondering if it's a bug or intentional. The behavior concerns converting an APFloat to a string and back again. In the implementation of ``APFloat::toString(...)`` you can specify ``FormatPrecision`` as 0. The method comments
2015 Sep 01
3
anyone want to help tune up computeKnownBits()?
While looking at optimizations where Souper exploits known bits, I realized that it would be easy to teach Souper to compute known bits. Comparing its results against computeKnownBits() from r246393, it looks like there are some easy (and some not-easy) opportunities for improvement, please see a few examples below. The expressions come from compiling LLVM itself. Happily, this exercise
2013 Jun 18
2
[LLVMdev] Failure handling half type
Here there is the dump: SelectionDAG.cpp:81: static bool llvm::ConstantFPSDNode::isValueValidForType(llvm::EVT, const llvm::APFloat &): Assertion `VT.isFloatingPoint() && "Can only convert between FP types"' failed. 0 libLLVMSupport.so 0x00007f7405022de5 llvm::sys::PrintStackTrace(_IO_FILE*) + 37 1 libLLVMSupport.so 0x00007f74050232e3 2 libpthread.so.0
2013 Jul 11
1
[LLVMdev] Bikeshedding a name for new directive: CHECK-LABEL vs. CHECK-BOUNDARY vs. something else.
Hi, I would like to add a new directive to FileCheck called CHECK-FOO (where FOO is a name under discussion right now) which is used to improve error messages. The idea is that you would use CHECK-FOO on any line that contains a unique identifier (typically labels, function definitions, etc.) that is guaranteed to only occur once in the file; FileCheck will then conceptually break the break the
2015 Jan 20
2
[LLVMdev] Bug in InsertElement constant propagation?
Does anybody else have an opinion on this issue? I'm planning to submit a patch which would add a new get method for ConstantDataVector taking an ArrayRef<Constant*> and use that in the few places in constant propagation where convertToFloat is used. Let me know if you think there is a more obvious way to do it. Right now the only way to create a ConstantDataVector are those method:
2009 Mar 02
6
[LLVMdev] Please review the 2.5 release notes
Hi All, Please review the 2.5 release notes here: http://llvm.org/docs/ReleaseNotes.html Let me know if you have any additions, improvements, or see any oversights. If you have commit access, please just directly change the document. The release is planned to go out in about 24 hours from now! Thanks! -Chris
2013 Jun 17
0
[LLVMdev] Failure handling half type
Make sure you’re running LLVM with assertions enabled. You’ll get more information about what’s going wrong that way. That said, yes, this looks like a bug. Specifically, SelectionDAGLegalize::ExpandConstantFP() assumes that f32 is the smallest floating point constant type it’ll need to handle, and that MVT enum ordering reflects that. while (SVT != MVT::f32) {
2013 Jun 17
2
[LLVMdev] Failure handling half type
Hi, if I write the following simple program: target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" define void @foo () { %1 = alloca half store half 0xH42CC, half* %1 ; 0xH42CC = 3.4 %2 = load half* %1
2007 Dec 15
1
[LLVMdev] strict aliasing in SPU land
/Volumes/mrs5/net/llvm/llvm/llvm/lib/Target/CellSPU/ SPUISelDAGToDAG.cpp: In function 'bool<unnamed>::isFPS16Immediate(llvm::ConstantFPSDNode*, short int&)': /Volumes/mrs5/net/llvm/llvm/llvm/lib/Target/CellSPU/ SPUISelDAGToDAG.cpp:141: warning: dereferencing type-punned pointer will break strict-aliasing rules In file included from