similar to: [PATCH] ACPI/cpuidle: remove unused "power" field from Cx state data

1: x86/mwait_idle: remove assumption of one C-state per MWAIT flag 2: x86/mwait_idle: export both C1 and C1E 3: x86/mwait_idle: initial C8, C9, C10 support Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Jan Beulich <jbeulich@suse.com>

# HG changeset patch # User Boris Ostrovsky <boris.ostrovsky@amd.com> # Date 1330642361 -3600 # Node ID 99df5c6b2964ceaa73651d7bc02fb1ae820f7691 # Parent a7bacdc5449a2f7bb9c35b2a1334b463fe9f29a9 x86: Use deep C states for off-lined CPUs Currently when a core is taken off-line it is placed in C1 state (unless MONITOR/MWAIT is used). This patch allows a core to go to deeper C states

This patchset enable support for C1 mwait entry. [PATCH 1/3] dom0-C1-FFH.patch. It gets C1 information from ACPI table and pass it to Xen. [PATCH 2/3] add-idx-field.patch. This patch adds an idx field in the ''struct acpi_processor_cx''. It can simplify some coding lines. [PATCH 3/3] xen-C1-FFH.patch. It adds support for C1 FFH (mwait) entry. Meanwhile add timing for C1. The

Hello, The following patches are a solution to a problem we have encountered when using the Xen hypervisor: - Need Pxx/Cxx states to save on power consumption when using Xen (we do want those datacenters to consume less power!), - Also need to figure out the Turbo mode so that the scheduler can properly boost a core for CPU bound guests. In essence the Xen hypervisor requires that

What is the point of specifying "current" as the address to monitor? The memory location of interest really is irq_stat[cpu].__softirq_pending, and if that was used it would then also be possible to actually avoid sending IPIs when monitor/mwait are in use, as is being done on Linux. Jan _______________________________________________ Xen-devel mailing list

[PATCH 1/2] Support multiple C3 states. There may be multiple ACPI C3 states mapped into different CPU C-states.So made some modification to support this case. [PATCH 2/2] Handle C2 LAPIC timer & TSC stop. ACPI C2 is quite possible mapped to CPU C3 or deeper state, so thinking from worst cases, enable C3 like entry/exit handling for C2 by default. Option ''lapic_timer_c2_ok''

Without this patch, while running on platforms on which the deepest C-state is C2, acpi_processor_idle fns will call into NULL function. BTW, made a little enhancement for keyhandler print-out to make it more readable. Signed-off-by: Wei Gang <gang.wei@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com

ACPI C2 is quite possible mapped to CPU C3 or deeper state, so thinking from worst cases, enable C3 like entry/exit handling for C2 by default. Option ''lapic_timer_c2_ok'' can be used to select simple C2 entry/exit only if the user make sure that LAPIC tmr & TSC will not be stopped during C2. Signed-off-by: Wei Gang <gang.wei@intel.com>

cpuidle: Fix for timer_deadline==0 case After the scheduler timer became suspended before entering cpu idle state, the percpu timer_deadline is possible to be 0, i.e. no soft timer in the queue. This case will cause unexpected large residency percentage in C1 for the purely idle cpu. The fix is if timer_deadline == 0, skip most hpet broadcast enter logic because no broadcast is needed for this

Dom0 uses this hypercall to pass ACPI information to Xen. It is not very uncommon for more cpus to be listed in the ACPI tables than are present on the system, particularly on systems with a common BIOS for a 2 and 4 socket server varients. As Dom0 does not control the number of entries in the ACPI tables, and is required to pass everything it finds to Xen, reduce the ERR to an INFO.

_______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

On 03/23/2011 08:43 AM, Len Brown wrote: > Why is this patch a step forward? Hi Len, I have basically moved the code for arch default and mwait idle from arch/x86/kernel/process.c to a driver. This was suggested by Venki (https://lkml.org/lkml/2010/10/19/460) as part of pm_idle cleanup and direct call of cpuidle_idle_call(). There is not much new code here. > >> +obj-$(CONFIG_X86)

CPUIDLE: Avoid remnant LAPIC timer intr while force hpetbroadcast LAPIC will stop during C3, and resume to work after exit from C3. Considering below case: The LAPIC timer was programmed to expire after 1000us, but CPU enter C3 after 100us and exit C3 at 9xxus. 0us: reprogram_timer(1000us) 100us: entry C3, LAPIC timer stop 9xxus: exit C3 due to unexpected event, LAPIC timer continue running

On Tue, Mar 22, 2011 at 06:03:28PM +0530, Trinabh Gupta wrote: > This patch implements a default cpuidle driver for xen. > Earlier pm_idle was flipped to default_idle. Maybe there > is a better way to ensure default_idle is called > without using this cpuidle driver. Please also CC the Xen devel mailing list (I did this for you) I couldn''t find it in the description, but I

Since the image pointed to may (and generally will) live in boot services memory (which we add to the global memory pool long before ACPI tables get looked at), we should prevent Dom0 from trying to retrieve the image data. The alternatives would be to - not add boot services memory to the global pool at all, or - defer adding boot services memory until Dom0 indicates it is safe to do so, or -

On 16/11/2017 10:12, Quan Xu wrote: > > > On 2017-11-16 06:03, Thomas Gleixner wrote: >> On Wed, 15 Nov 2017, Peter Zijlstra wrote: >> >>> On Mon, Nov 13, 2017 at 06:06:02PM +0800, Quan Xu wrote: >>>> From: Yang Zhang <yang.zhang.wz at gmail.com> >>>> >>>> Implement a generic idle poll which resembles the functionality

On 16/11/2017 10:12, Quan Xu wrote: > > > On 2017-11-16 06:03, Thomas Gleixner wrote: >> On Wed, 15 Nov 2017, Peter Zijlstra wrote: >> >>> On Mon, Nov 13, 2017 at 06:06:02PM +0800, Quan Xu wrote: >>>> From: Yang Zhang <yang.zhang.wz at gmail.com> >>>> >>>> Implement a generic idle poll which resembles the functionality

Since the image pointed to may live in boot services memory (which we add to the global memory pool long before ACPI tables get looked at), we should prevent Dom0 from trying to retrieve the image data in that case. The alternatives would be to - not add boot services memory to the global pool at all, or - defer adding boot services memory until Dom0 indicates it is safe to do so, or - find and

Recently our automated testing system has caught a curious assertion while testing Xen 4.1.5 on a HaswellDT system. (XEN) Assertion ''(sp == 0) || (peoi[sp-1].vector < vector)'' failed at irq.c:1030 (XEN) ----[ Xen-4.1.5 x86_64 debug=n Not tainted ]---- (XEN) CPU: 0 (XEN) RIP: e008:[<ffff82c48016b2b4>] do_IRQ+0x514/0x750 (XEN) RFLAGS: 0000000000010093 CONTEXT: