similar to: Unexpected results

Hello, At my work we have multiple freebsd machines running samba. Love it, things are working great. We have several windows 2000 servers that our engineers store their working drawings on. I need to create a mirror of this engineering windows 2000 machine to a freebsd machine running samba. The purpose of this is so that regular employees, welders whatever can just read the drawings on

Hi Folks, I've got a question concerning the calculation of the Schwarz-Criterion (BIC) done by summary.regsubsets() of the leaps-package: Using regsubsets() to perform subset-selection I receive an regsubsets object that can be summarized by summary.regsubsets(). After this operation the resulting summary contains a vector of BIC-values representing models of size i=1,...,K. My problem

when .dovecot.sieve is a symlink (which it is in my case) a warning is written to the error log file, but it still works. Dec 12 10:02:33 managesieve(tester at domain.com): Warning: sieve-storage: Active sieve script symlink /srv/vmail/sieve/domain.com/tester/.dovecot.sieve is broken: invalid/unknown path to storage (points to ingo.sieve). root at

I made an array out of 3 IBM 20 gigs and 3 Maxtor 20 gigs I used striping to make one big drive A couple of days ago I was copying a movie onto to it and the computer decided to reboot when it came back up I was greeted with this message Can someone please tell me if I can recover some how? or should I just rebuild the array? or is one of my disks physically bad? Detects all 7 drives (1 10gig

Hi folks, hi Tom I found the problem. Originally I did a 'chmod -R 1777 root:root /home'. This prevents users other than owner to delete files on the subdirs like my "condivisione" (see smb.inf below). Because the saving operation of autoCAD .dwg files involves several steps of create-rename-delete temporary file before save THE .dwg file, permissions "1777" avoid the

Howdy, Found out about this project while looking for via ONLamp''s FreeBSD build system article. After finding cfengine a tad arcane, this project seems like a good fit for my setup. I''m still at the tinkering phase, but I envision this thing bootstrapping and maintaining several FreeBSD installs which have different CPU''s and packages. The Good News:

Trying to revive this old thread as problems continue. I have noticed from the gluster logs the following on m y volume called export: [2017-08-16 20:08:47.663908] I [MSGID: 109066] [dht-rename.c:1608:dht_rename] 0-export-dht: renaming /projects/ACTIVE/Automotive/JEEP/Brand Image Program June 2016/04_Western Region/Huntington Beach CDJR - Huntington Beach, CA/04 REVIT AND CAD/2017-08-16 CAD dwgs

Well, colleagues, I'm stuck a bit. I tried many different ways to setup system with vinum root (the only reference I found yet besides old "bootstrapping vinum" article is Joerg's commit message: http://freebsd.rambler.ru/bsdmail/cvs-all_2003/msg01225.html I failed. I have 4-stable system set up at ad0, and tried to set up pair of drives for new system at ad2 and ad3 (actually,

FreeBSD 4.1.1-RELEASE #1: Tue Oct 10 18:09:51 CDT 2000 root@test-drive.tamu.edu:/usr/src/sys/compile/TEST-DRIVE Timecounter "i8254" frequency 1193182 Hz CPU: Pentium III/Pentium III Xeon/Celeron (501.14-MHz 686-class CPU) Origin = "GenuineIntel" Id = 0x683 Stepping = 3 Features=0x383fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CM

The datasheet is available at http://download.intel.com/design/network/datashts/82599_datasheet.pdf See 'Table 9.7. VF PCIe Configuration Space' of the datasheet, the PCI Express Capability Structure of the VF of Intel 82599 10GbE Controller looks trivial, e.g., the PCI Express Capabilities Register is 0, so the Capability Version is 0 and pt_pcie_size_init() would fail. We should not

Hi, We're planning to deploy PXELINUX as a primary kernel loader in cluster environment. Problem is that we plan to have IP numbers assigned dynamically while there is no guarantee that all machines has same CPU architecture. This makes IP-based config search algorithm inappropriate for our purposes because we [naturally] expect loaded kernel to match hardware. For this reason I've

I am looking at a mini-itx system that has the Intel chipset. The video spec is the "Intel 852GM GMCH". Anyone know anything good or bad about this? The board is iGoLogic i3386G

Hi, I saw that Xen support a translation between device/intx to GSI for a single PCI bus, I thought about adding multiple PCI bus support but disregard the bus information so the same device/intx on different buses will be OR wired to the same GSI, sounds reasonable? What other things do I need to support in Xen in order to add multiple PCI buses, assuming that secondary buses holds only

Did the logs provide any hints as to what the issue may be? Diego On Sat, Jun 3, 2017 at 12:16 PM, Diego Remolina <dijuremo at gmail.com> wrote: > Thanks for taking the time to look into this. Since we needed downtime > due to the gluster update, we also updated the OS, including samba. We > went from 4.2.x to 4.4.4 and many other packages for CentOS were > updated as well. OS

installation starts but after autocad 2008 doesn't install.. :( :( :( [/code]

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Hi Could anybody explain me how to check how many L1/L2 cache my cpu have. I'm using CentOS 5.6 *cat /proc/cpuinfo |grep CPU * model name : Intel(R) Core(TM)2 Duo CPU T9300 @ 2.50GHz model name : Intel(R) Core(TM)2 Duo CPU T9300 @ 2.50GHz Diagram of a generic dual-core processor, with CPU-local level 1 caches, and a shared, on-die level 2 cache.

Recently, I''ve been reading through the ZIL/slog discussion and have the impression that a lot of folks here are (like me) interested in getting a viable solution for a cheap, fast and reliable ZIL device. I think I can provide such a solution for about $200, but it involves a lot of development work. The basic idea: the main problem when using a HDD as a ZIL device are the cache flushes