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Hi Graham, Thank you for offering help. I am trying to create a reproducer. The problem is that the crashes happen whilst LTO is used. One thing I am sure about IR is broken at compile time. Thanks, Evgeny From: Graham Yiu <gyiu at ca.ibm.com> Date: Friday, 10 November 2017 at 16:09 To: Evgeny Astigeevich <Evgeny.Astigeevich at arm.com> Cc: "junbuml at codeaurora.org" <junbuml at codeaurora.org>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>, nd <nd at arm.co...

Forgot to add that all experiments were done with '-O3 -m64 -fexperimental-new-pass-manager'. Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com From: Graham Yiu/Toronto/IBM To: llvm-dev at lists.llvm.org Cc: junbuml at codeaurora.org, xinliangli at gmail.com Date: 11/02/2017 05:26 PM Subject: [RFC] Enable Partial...

Hi Evgeny, I just realized that if these are compile-time errors I can help investigate on my end. Do you have something I can use to reproduce? Cheers, Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com From: Graham Yiu/Toronto/IBM To: Evgeny Astigeevich <Evgeny.Astigeevich at arm.com> Cc: "junbuml at codeaurora.org" <junbuml at codeaurora.org>,...

On Tue, Oct 3, 2017 at 1:46 PM, Teresa Johnson via llvm-dev < llvm-dev at lists.llvm.org> wrote: > > > On Tue, Oct 3, 2017 at 1:38 PM, Graham Yiu <gyiu at ca.ibm.com> wrote: > >> Hi Teresa, >> >> Actually, enabling the new pass manager manually seems to have solved >> this issue, so this problem is only valid for the old pass manager. >> > > It should not be an issue in the old PM either - the cal...

Hi Teresa, Actually, enabling the new pass manager manually seems to have solved this issue, so this problem is only valid for the old pass manager. Thanks, Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com From: Teresa Johnson <tejohnson at google.com> To: Graham Yiu <gyiu at ca.ibm.com> Cc: llvm-dev <llvm-dev at lists.llvm.org> Date: 10/03/2017 04:18 PM Su...

...maller boosts/penalties compared to callsite information. Teresa, do you know if there is some documentation/video/presentation on how PGO information is represented in LLVM and what information is passed via the IR? I'm finding some difficulty in getting the big picture via the code. Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com From: Teresa Johnson <tejohnson at google.com> To: Easwaran Raman <eraman at google.com> Cc: Graham Yiu <gyiu at ca.ibm.com>, llvm-dev <ll...

...s this week. Thanks, Evgeny Astigeevich From: llvm-dev <llvm-dev-bounces at lists.llvm.org> on behalf of Evgeny Astigeevich via llvm-dev <llvm-dev at lists.llvm.org> Reply-To: Evgeny Astigeevich <Evgeny.Astigeevich at arm.com> Date: Saturday, 11 November 2017 at 17:21 To: Graham Yiu <gyiu at ca.ibm.com> Cc: "junbuml at codeaurora.org" <junbuml at codeaurora.org>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>, Tobias Grosser <tobias.grosser at inf.ethz.ch>, nd <nd at arm.com> Subject: Re: [llvm-dev] [RFC] Enable Part...

...the function in 99.xx% of the cases, as it's unclear how much performance we'll gain from just outlining (without inlining to increase the odds of some performance gain). My initial thought was to ditch the new function and its outlined children if we cannot immediately inline it. Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com From: Xinliang David Li <xinliangli at gmail.com> To: Graham Yiu <gyiu at ca.ibm.com> Cc: llvm-dev <llvm-dev at lists.llvm.org> Date: 08/24/2017 03:05 PM...

...y able to handle ? Going through the code, it looks like the only requirement is for the header to dominate all the BB in the region ; On Sat, Aug 26, 2017 at 9:52 AM, Xinliang David Li via llvm-dev < llvm-dev at lists.llvm.org> wrote: > > > On Thu, Aug 24, 2017 at 12:47 PM, Graham Yiu <gyiu at ca.ibm.com> wrote: > >> Hi David, >> >> The only reason I can see to use the 'pattern matching' part as a >> fall-back is in case we cannot inline the (what I'm assuming would be) a >> much bigger hot-path-only cloned function for whatever...

...s? If not, are there plans to do so in the future? For inlining specifically, perhaps we can mark callsites with hot/cold attributes during compile step to ensure LTO inlining will give appropriate threshold bonuses/penalties. Any thoughts/insights/comments would be appreciated. Cheers, Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20171003/18c2b6f6/attachment.html>

...rly returns (ie. the way we have it today). This would require us to clone the original function twice and modify one based on cold region outlining and the other early return peeling, with the latter being our fall-back option if we fail to inline the first clone. What are your thoughts? Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com From: Graham Yiu/Toronto/IBM To: Xinliang David Li <xinliangli at gmail.com> Cc: llvm-dev <llvm-dev at lists.llvm.org> Date: 08/15/2017 08:04 PM Subject: Re: [...

...he entry block. At a high level, I have two questions: 1. What is the main obstacle that prevent the pass from being enabled by default? 2. Would it make sense to give some bonus in the cost model when we detect the possibility of spilling CSRs in the entry block? Thanks, Jun From: Graham Yiu [mailto:gyiu at ca.ibm.com] Sent: Tuesday, October 3, 2017 11:08 AM To: junbuml at codeaurora.org Cc: llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] General question about enabling partial inlining Hi Jun, We're actually looking at enhancing the partial inlining pass right now (see &l...

On Tue, Oct 3, 2017 at 12:08 PM, Davide Italiano <davide at freebsd.org> wrote: > On Tue, Oct 3, 2017 at 11:57 AM, Graham Yiu via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >> Hello, >> >> I recently noticed that the new pass manager was not enabled at regular/thin >> LTO link step even if '-fexperimental-new-pass-manager' was specified in the >> compile step and link ste...

...all overhead for executing cold code. - The confidence factor, which can be viewed as the minimum number of times the predecessor has to be executed in order for an edge to be considered cold, should also be taken into account to avoid outlining code paths we have little information on. Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-407/8200/Markham Email: gyiu at ca.ibm.com -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170815/17fc26c9/attachment.html>

...ta available. I haven't looked at the machine outliner yet, but my understanding is it also prioritizes code size reduction over performance gains. Is my assumption correct? Do you think there's some tuning we can do in the machine outliner to tailor for performance improvements? Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-407/8200/Markham Email: gyiu at ca.ibm.com From: Jessica Paquette <jpaquette at apple.com> To: Graham Yiu <gyiu at ca.ibm.com> Cc: llvm-dev at lists.llvm.org Date: 08/15/2017 02:45 PM Subject: Re: [llvm...

...> > SWITCH2: > switch(val) { > COLD1: ... > COLD2: ... > .... > COLDN: ... > default: ... > } > > > This is profile based switch peeling -- which is a separate optimization from partial inlining. David > On Tue, Aug 15, 2017 at 1:14 PM, Graham Yiu via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> Hi Jessica, >> >> Thanks for the feedback. >> >> I believe the existing partial inliner pass does use some common >> utilities like the code extractor to do outlining. >> > AFAIK, Code...

...p if not, should we pass an option via '-plugin-opt', or via some other mechanism? It's unclear to me what the preferred method of passing configuration options to LTO/thinLTO link step is. Any insights/thoughts/comments would be greatly appreciated. Cheers, Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20171003/4c253cf7/attachment.html>

Hi, I noticed some performance gains in some spec benchmarks without significant code size bloat when aggressively performing partial inlining, especially when the original callee spill CSRs in the entry block. I guess the partial inlining is not enabled mainly due to the code size. Is there any other issue which prevent the pass from being enabled? Do we have any plan or any on-going works

...., DO NOT change the names before the function imodwt. This is because the function imodwt looks for the names created by the modwt function. If you need to change names, do it AFTER the reconstruction. I hope that it helps you. Rogerio ---------- Cabe?alho original ----------- De: "Airon Yiu" aironyiu at yahoo.com.hk Para: "rdporto1" rdporto1 at terra.com.br C?pia: "r-help" r-help at stat.math.ethz.ch Data: Wed, 15 Nov 2006 23:49:57 +0800 (CST) Assunto: ??: Re:??: Re:[R] Need help in waveslim package: imodwt and universal.thresh.modwt > Hi Rogerio: >...

...d other tasks. I’ll check if the code size issues still exist. Thanks, Evgeny Astigeevich From: Sean Fertile <sd.fertile at gmail.com> Date: Monday, 29 January 2018 at 19:52 To: Florian Hahn <Florian.Hahn at arm.com> Cc: Evgeny Astigeevich <Evgeny.Astigeevich at arm.com>, Graham Yiu <gyiu at ca.ibm.com>, "junbuml at codeaurora.org" <junbuml at codeaurora.org>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>, Tobias Grosser <tobias.grosser at inf.ethz.ch>, nd <nd at arm.com> Subject: Re: [llvm-dev] [RFC] Enable Partial...