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Thanks for your help. But I got this warning which it seems it doesn't use -triple "clang: warning: argument unused during compilation: '-triple arm-none-eabi' " Best Regards, A. Yazdanbakhsh >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> PhD. Student School of Electrical and Computer Engineering University of Wisconsin-Madison E-mail: yazdanbakhsh at wisc.edu <<<<&l...

...on ubuntu. I want to cross-compile a C code into ARM (preferably) ARMv7. I want to get both assembly code and binary. Can anyone help me what are the steps which should I take? Second question, Is there anyway to tell compiler not to use any Thumb/NEON/VFP instructions? Thanks Best Regards, A. Yazdanbakhsh >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> PhD. Student School of Electrical and Computer Engineering University of Wisconsin-Madison E-mail: yazdanbakhsh at wisc.edu <<<<&l...

...mbly and assembly/link with ARM gnu binutils, which is essentially the same thing, for now. Feel free to search for those three options on the list and you'll find a plethora or examples and discussions that will guide you through the process. cheers, --renato On 8 December 2012 19:52, Amir Yazdanbakhsh <amir.yazdanbakhsh at gmail.com> wrote: > Thanks for your help. But I got this warning which it seems it doesn't use > -triple > > "clang: warning: argument unused during compilation: '-triple arm-none-eabi' > " > > Best Regards, > A. Yazdanbakhsh...

OK. Thanks for your help. My problem is I am playing with the size of registerfile in ARM. I thought I can do it with only modifying the Target in the LLVM directory. But if it is going to use gcc-toolchain, then I need to modify them as well which is a huge work! Best Regards, A. Yazdanbakhsh >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> PhD. Student School of Electrical and Computer Engineering University of Wisconsin-Madison E-mail: yazdanbakhsh at wisc.edu <<<<&l...

Thanks Tim. I just need the assembly file. Anyway, I still have problem with generating assembly for the ARM without having any thumb and other fancy instructions. Best Regards, A. Yazdanbakhsh >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> PhD. Student School of Electrical and Computer Engineering University of Wisconsin-Madison E-mail: yazdanbakhsh at wisc.edu <<<<&l...

On 8 December 2012 19:10, Amir Yazdanbakhsh <amir.yazdanbakhsh at gmail.com> wrote: > Hi, > > I've installed clang version 3.3 on ubuntu. > I want to cross-compile a C code into ARM (preferably) ARMv7. I want to get > both assembly code and binary. Can anyone help me what are the steps which > should I take? clan...

Hi Amir, On Dec 8, 2012 8:13 PM, "Amir Yazdanbakhsh" <amir.yazdanbakhsh at gmail.com> wrote: > My problem is I am playing with the size of registerfile in ARM. I thought I can do it with only modifying the Target in the LLVM directory. But if it is going to use gcc-toolchain, then I need to modify them as well which is a huge work! Th...

...bly code) a simple C code in ARM. First, I use CLANG to get LLVM bytecode, then I use llc to generate assembly for ARM. The problem is it never uses any other register except r0-r3 and always uses spill code even if other register are available to use. Anyone has any idea? Thanks Best Regards, A. Yazdanbakhsh >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> PhD. Student School of Electrical and Computer Engineering University of Wisconsin-Madison E-mail: yazdanbakhsh at wisc.edu <<<<&l...

Sound like you are not enabling optimization. Try with -O3. Evan On Dec 9, 2012, at 12:49 AM, Amir Yazdanbakhsh <amir.yazdanbakhsh at gmail.com> wrote: > Hi All, > > I am working to cross compile (just generate assembly code) a simple C code in ARM. First, I use CLANG to get LLVM bytecode, then I use llc to generate assembly for ARM. The problem is it never uses any other register except r0-...

I almost change all the instruction formats. It was a huge work. I am going to compile and run it now. Best Regards, A. Yazdanbakhsh >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> PhD. Student School of Electrical and Computer Engineering University of Wisconsin-Madison E-mail: yazdanbakhsh at wisc.edu <<<<&l...

Hi, I want to increase the number of integer registers in the ARM machine. I don't have any idea how/where I can start. Can anybody help me? By the way, what are the following line in the ARMRegisterInfo.td specify: def qsub_0 def qsub_1 .... Thanks Best Regards, A. Yazdanbakhsh >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> PhD. Student School of Electrical and Computer Engineering University of Wisconsin-Madison E-mail: yazdanbakhsh at wisc.edu <<<<&l...

> I almost change all the instruction formats. It was a huge work. I am going > to compile and run it now. We have done the similar work[1] on this topic by gcc and we have start migrate our platform to LLVM. In my experience, you need to take care the follow part: * ARMBaseRegisterInfo::getRegPressureLimit * ARMBaseRegisterInfo::getRawAllocationOrder * CalleeSavedRegs *

...rchitecture. Do you have any ideas? As far as I know, the generated ll code doesn't depend on the target (right?), but I see this line in the ll code : target triple = "x86_64-unknown-linux-gnu" Could it be the problem? I really appreciate if anybody can help. Best Regards, A. Yazdanbakhsh >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> PhD. Student School of Electrical and Computer Engineering University of Wisconsin-Madison E-mail: yazdanbakhsh at wisc.edu <<<<&l...

On Thu, Dec 06, 2012 at 09:13:53AM +0000, David Chisnall wrote: > On 6 Dec 2012, at 07:46, 陳韋任 (Wei-Ren Chen) wrote: > > > The code below in lib/Target/ARM/ARMRegisterInfo.td is where you > > should look into, > > > > // Integer registers > > def R0 : ARMReg< 0, "r0">, DwarfRegNum<[0]>; > > def R1 : ARMReg< 1,

On Sun, Dec 9, 2012 at 7:48 PM, Evan Cheng <evan.cheng at apple.com> wrote: > Sound like you are not enabling optimization. Try with -O3. Ah, of course! I'd forgotten about the extra allocas produced by clang. To expand a little, the spills you're seeing are (probably) specifically created by clang (it creates a shadow variable for each local with alloca). "llc" on its

On 6 Dec 2012, at 07:46, 陳韋任 (Wei-Ren Chen) wrote: > The code below in lib/Target/ARM/ARMRegisterInfo.td is where you > should look into, > > // Integer registers > def R0 : ARMReg< 0, "r0">, DwarfRegNum<[0]>; > def R1 : ARMReg< 1, "r1">, DwarfRegNum<[1]>; > > ... That's the easy part. ARM (AArch32) has 16 registers

On Wed, Dec 05, 2012 at 09:17:12PM -0600, Amir Yazdanbakhsh wrote: > Hi, > > I want to increase the number of integer registers in the ARM machine. > I don't have any idea how/where I can start. Can anybody help me? The code below in lib/Target/ARM/ARMRegisterInfo.td is where you should look into, // Integer registers def R0 : ARMReg&l...