search for: yabin

Displaying 20 results from an estimated 43 matches for "yabin".

2011 May 31
2
[LLVMdev] multiple function return values in LLVM
Hi all, How can I implement a multiple function return values scheme in a performance efficient way, just like what be done in Matlab or Octave? Thanks in advance, Yabin -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110531/5813e7a6/attachment.html>
2011 May 31
0
[LLVMdev] multiple function return values in LLVM
Hi Yabin, Octave uses an octave_value_list object to return multiple values so I don't think it has anything to do with the compiler. A sample function that can be dynamically linked with Octave and called from octave interpreter: #include <octave/oct.h> DEFUN_DLD (divmult, args, nargout, &quot...
2011 Sep 26
3
[LLVMdev] PTX backend do not support sitofp instruction?
Hi all, Does PTX backend support llvm sitofp instruction? I failed to compile my llvm source when use llc -march=ptx32. The reason is that the source has a sitofp instruction. After i changed the instruction into uitofp manually, it passed. Thanks in advance, best, Yabin -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110926/be6406e1/attachment.html>
2012 May 15
1
[LLVMdev] NVPTX: why ret instruction is not translated to exit in kernel function?
...; instruction at the end of a ptx_kernel function is translated to "exit" instruction. A test case named exit.ll demos this. But in the NVPTX backend, it seems that you didn't do such a translation. Why do you choose this? Is this due to the changes of the NVIDA PTX itself? Thanks, Yabin -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120515/505f679b/attachment.html>
2014 Sep 14
2
[LLVMdev] How to translate library functions into LLVM IR bitcode?
Hello, I run into a situation where I need to provide the library functions, such as sqrt() from <math.h> and rand() from <stdlib.h>, in the format of LLVM IR bitcode files. Then I can try to link the bitcode of my program against these library bitcode files to formulate a holistic bitcode file. However, these library functions are only available in object format. And the source
2012 Apr 28
2
[LLVMdev] [PATCH][RFC] Add llvm.codegen Intrinsic To Support Embedded LLVM IR Code Generation
...ure firstly. Then the call to the intrinsic is replaced by a pointer to the newly generated string. After this, we have in our module ** ** We would like to get the community’s feedback on this so as to make sure this patch is as universally applicable as possible. Thanks a lot! best regards, Yabin Hu -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120428/a48f97d1/attachment.html> -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-Add-llvm.codegen-intrinsic.patch...
2012 Apr 28
0
[LLVMdev] [PATCH][RFC] Add llvm.codegen Intrinsic To Support Embedded LLVM IR Code Generation
On Fri, Apr 27, 2012 at 7:40 PM, Yabin Hu <yabin.hwu at gmail.com> wrote: > Hi LLVMers, > > The attached patch adds a new Intrinsic named "llvm.codegen" to support > embedded LLVM IR code generation. **The 'llvm.codegen' intrinsic uses > the LLVM back ends to generate code for embedded LLVM IR st...
2012 Apr 03
0
[LLVMdev] GSoC 2012 Proposal: Automatic GPGPU code generation for llvm
Hi Yabin, Instead of compile the LLVM IR to PTX asm string in a ScopPass, you can also the improve llc/lli or create new tools to support the code generation for Heterogeneous platforms[1], i.e. generate code for more than one target architecture at the same time. Something like this is not very complicate...
2014 Sep 15
2
[LLVMdev] How to translate library functions into LLVM IR bitcode?
Thanks for your reply, Yabin. Actually I'm trying to come up with a way to translate any source code into bitcode format. So some of them are not necessarily LLVM intrinsics. Also it seems like that dynamically loading the library by dlopen() is for loading object files, not .bc files. So it might not be useful for librar...
2012 Apr 29
3
[LLVMdev] [PATCH][RFC] Add llvm.codegen Intrinsic To Support Embedded LLVM IR Code Generation
...nce and >> infrastructure that can help us to choose and implement a more >> complex later on. >> >> >> I agree that this approach is the best way to get short-term results, >> especially for the GSoC project. > > OK, let's go ahead. > > Yabin, can you update the patch with the following changes: > > - Remove the Arch flag > - Document that we require a triple > - Add two new arguments that take a feature string and a mcpu > flag (can be set to "", which means we use the default) Wait. I don't think there...
2012 May 09
0
[LLVMdev] [PATCH][RFC] Add llvm.codegen Intrinsic To Support Embedded LLVM IR Code Generation
...le and device bitcode file (or some others). What they need do is to prepare the device code as a string of llvm IR and add a call to the intrinsic. We believe that there is no need for all these external tools to be changed if we can avoid this by adding a new and light weight intrinsic. Thanks, Yabin -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120509/68fed1d3/attachment.html>
2012 Apr 04
3
[LLVMdev] GSoC 2012 Proposal: Automatic GPGPU code generation for llvm
On 04/03/2012 03:13 PM, Hongbin Zheng wrote: > Hi Yabin, > > Instead of compile the LLVM IR to PTX asm string in a ScopPass, you > can also the improve llc/lli or create new tools to support the code > generation for Heterogeneous platforms[1], i.e. generate code for more > than one target architecture at the same time. Something like thi...
2012 Apr 29
0
[LLVMdev] [PATCH][RFC] Add llvm.codegen Intrinsic To Support Embedded LLVM IR Code Generation
...e that can help us to choose and implement a more >>> complex later on. >>> >>> >>> I agree that this approach is the best way to get short-term results, >>> especially for the GSoC project. >> >> OK, let's go ahead. >> >> Yabin, can you update the patch with the following changes: >> >> - Remove the Arch flag >> - Document that we require a triple >> - Add two new arguments that take a feature string and a mcpu >> flag (can be set to "", which means we use the default) > >...
2010 Jul 26
2
[LLVMdev] hacking clang IdentifierTable
...def llvm::StringMap<IdentifierInfo*, llvm::BumpPtrAllocator> HashTableTy; HashTableTy HashTable; Can anyone explain the mechnism of handling the name string key collision for me? Is there a IdentifierInfo objects chain or list for variable or function with the same name? Thanks very much! Yabin -- The question is how do you generate these offline annotations and how expensive and accurate they are and why they are usefil in which applications? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100726/...
2012 Apr 02
6
[LLVMdev] GSoC 2012 Proposal: Automatic GPGPU code generation for llvm
Hi all, I am a phd student from Huazhong University of Sci&Tech, China. The following is my GSoC 2012 proposal. Comments are welcome! *Title: Automatic GPGPU Code Generation for LLVM* *Abstract* Very often, manually developing an GPGPU application is a time-consuming, complex, error-prone and iterative process. In this project, I propose to build an automatic GPGPU code generation framework
2012 Apr 28
4
[LLVMdev] [PATCH][RFC] Add llvm.codegen Intrinsic To Support Embedded LLVM IR Code Generation
Hi Justin, Thanks very much for your comments. 2012/4/28 Justin Holewinski <justin.holewinski at gmail.com> > On Fri, Apr 27, 2012 at 7:40 PM, Yabin Hu <yabin.hwu at gmail.com> wrote: > >> The attached patch adds a new Intrinsic named "llvm.codegen" to support >> embedded LLVM IR code generation. **The 'llvm.codegen' intrinsic uses >> the LLVM back ends to generate code for embedded LLVM IR strings....
2012 Apr 29
0
[LLVMdev] [PATCH][RFC] Add llvm.codegen Intrinsic To Support Embedded LLVM IR Code Generation
...r needs and will allow us to get the experience and > infrastructure that can help us to choose and implement a more > complex later on. > > > I agree that this approach is the best way to get short-term results, > especially for the GSoC project. OK, let's go ahead. Yabin, can you update the patch with the following changes: - Remove the Arch flag - Document that we require a triple - Add two new arguments that take a feature string and a mcpu flag (can be set to "", which means we use the default) Cheers Tobi
2012 Apr 04
0
[LLVMdev] GSoC 2012 Proposal: Automatic GPGPU code generation for llvm
On Wed, Apr 4, 2012 at 4:49 AM, Tobias Grosser <tobias at grosser.es> wrote: > On 04/03/2012 03:13 PM, Hongbin Zheng wrote: > > Hi Yabin, > > > > Instead of compile the LLVM IR to PTX asm string in a ScopPass, you > > can also the improve llc/lli or create new tools to support the code > > generation for Heterogeneous platforms[1], i.e. generate code for more > > than one target architecture at the same...
2012 Apr 28
0
[LLVMdev] [PATCH][RFC] Add llvm.codegen Intrinsic To Support Embedded LLVM IR Code Generation
On 04/28/2012 10:25 AM, Yabin Hu wrote: > Hi Justin, > > Thanks very much for your comments. > > 2012/4/28 Justin Holewinski <justin.holewinski at gmail.com > <mailto:justin.holewinski at gmail.com>> > > On Fri, Apr 27, 2012 at 7:40 PM, Yabin Hu <yabin.hwu at gmail.com > <mai...
2011 Jun 29
1
[LLVMdev] HOWTO use llvm lit tool
...orial about how to use llvm-lit tool? I copy and revise Makefile and lit.cfg etc from clang to my project. However, when I run make test it always seem unable to find the FileCheck tool correctly. How can I fix it? Can anybody add test feature to llvm/project/sample? Thanks in advance! best, Yabin -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110629/26981e39/attachment.html>