search for: xiaofei

Displaying 18 results from an estimated 18 matches for "xiaofei".

2013 Jul 16
8
[LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code generation
...LLVM code infrastructure Current status and test result 1. Parallel llc can generate same code as single thread by "objdump -d", it could pass 10 hours stress test for all performance benchmark 2. Parallel llc can introduce ~2.9X performance gain on XEON sever for 4 threads Thanks Wan Xiaofei -------------- next part -------------- A non-text attachment was scrubbed... Name: Parallel.CG.7z Type: application/octet-stream Size: 24682 bytes Desc: Parallel.CG.7z URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130716/9fa272e0/attachment.obj>
2013 Oct 15
0
[LLVMdev] Reverse engineering for LLVM bit-code
...ame of identifiers in source code makes C/C++ file very difficult to analyze. In other cases one might use anti-debugger tricks or execution code in virtual machine. Everything depends on the level of obfuscation, it is impractical to make LLVM IR a tool for that. Thanks, --Serge 2013/10/15 Wan, Xiaofei <xiaofei.wan at intel.com> > HI, > > I am interested in whether LLVM bit-code is ready for a distribution > format(stored in software distribution package); is it easy to revert LLVM > IR to C/C++ source code like Java byte code? My understanding is that. > 1. LLVM IR is mo...
2013 Jul 17
3
[LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code generation
-----Original Message----- From: Shuxin Yang [mailto:shuxin.llvm at gmail.com] Sent: Wednesday, July 17, 2013 1:50 AM To: Wan, Xiaofei Cc: Evan Cheng; Shuxin Yang; LLVM Developers Mailing List (llvmdev at cs.uiuc.edu) Subject: Re: [LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code generation On 7/16/13 7:23 AM, Wan, Xiaofei wrote: > Yes, the purpose is similar, we started this job from last year; But...
2013 Oct 15
3
[LLVMdev] Reverse engineering for LLVM bit-code
...code like Java byte code? My understanding is that. 1. LLVM IR is more like assembly code, so it is not easy for reverse engineering. 2. If it is easy for reverse engineering, does it mean it is not suitable for distribution format? Otherwise code obfuscation in IR level must be added. Thanks Wan Xiaofei
2013 Jul 16
0
[LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code generation
...dding new functionality like parallelism. However, so far no one has really had time to do this (including myself). While I would like to have time in the future to do this, as with everything else in OSS, it won't be real until the patches start flowing. On Tue, Jul 16, 2013 at 3:33 AM, Wan, Xiaofei <xiaofei.wan at intel.com> wrote: > Hi, community: > > For the sake of our business need, I want to enable "Function-based > parallel code generation" to boost up the compilation of single module, > please see the details of the design and provide your feedbacks on b...
2013 Jul 16
2
[LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code generation
...and function based parallelism are 1. how to partition module into different pieces which consume similar time, it is a difficult question 2. How to make sure the generated binary is same each time 3. if 2 can't be achieved, it is difficult to validate the correctness of parallelism Thanks Wan Xiaofei -----Original Message----- From: Evan Cheng [mailto:evan.cheng at apple.com] Sent: Tuesday, July 16, 2013 8:28 PM To: Wan, Xiaofei Cc: LLVM Developers Mailing List (llvmdev at cs.uiuc.edu); Shuxin Yang Subject: Re: [LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code genera...
2013 Jul 16
0
[LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code generation
Please see Shuxin's proposal on "parallelizing post-IPO stage". It seems the two projects are related. Evan On Jul 16, 2013, at 3:33 AM, "Wan, Xiaofei" <xiaofei.wan at intel.com> wrote: > Hi, community: > > For the sake of our business need, I want to enable "Function-based parallel code generation" to boost up the compilation of single module, please see the details of the design and provide your feedbacks on belo...
2013 Jul 16
0
[LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code generation
On Tue, Jul 16, 2013 at 3:33 AM, Wan, Xiaofei <xiaofei.wan at intel.com> wrote: > Hi, community: > > For the sake of our business need, I want to enable "Function-based parallel code generation" to boost up the compilation of single module, please see the details of the design and provide your feedbacks on below aspect...
2014 Jun 19
2
[LLVMdev] __fp16 suport in llvm back-end
...k" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind readnone } !llvm.ident = !{!0} !0 = metadata !{metadata !"clang version 3.5.0 (trunk 211249)"} Thanks Wan Xiaofei
2013 Jul 17
0
[LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code generation
On 7/16/2013 9:51 PM, Wan, Xiaofei wrote: > [Xiaofei] why? I don't understand it very well here, you mean it can > generate totally identical binaries as the original llc, including the > function order (function order may not affect code quality, but we > should make sure the output is same in each run)? Per &l...
2013 Jul 16
0
[LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code generation
On 7/16/13 7:23 AM, Wan, Xiaofei wrote: > Yes, the purpose is similar, we started this job from last year; > But it Shuxin's solution is module based (correct me if I am wrong), we tried this solution and failed for many reasons, it is described in my design document > https://docs.google.com/document/d/1QSkP6AumMCAVp...
2013 Jan 29
4
[LLVMdev] [Patch][Review Requested][Compilation Time] Avoid frequent copy of elements in LoopStrengthReduce
...or size in LoopStrengthReduce. It is observed that the BaseRegs vector size is 4 in most cases, and elements are frequently copied when it is initialized as SmallVector<const SCEV *, 2> BaseRegs. Our benchmark results show that the compilation time performance improved by ~0.5%. Patch by Wan Xiaofei. Thanks Sriram -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130129/137e5b0b/attachment.html> -------------- next part -------------- A non-text attachment was scrubbed... Name: loopStrengthReduce.patch...
2013 Jul 16
0
[LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code generation
...ches The patch is divided into four separated parts, the all-in-one patch could be found here: http://llvm-reviews.chandlerc.com/D1152 Design https://docs.google.com/document/d/1QSkP6AumMCAVpgzwympD5pI3btPJt4SRgjY-vhyfySg/edit?usp=sharing Function-based parallel LLVM backend code generation Wan Xiaofei (xiaofei.wan at intel.com) Background l Our business need to compile C/C++ source files into LLVM IR and link them into a big BC file; the big BC file is then compiled into binary code on different arch/target devices. l Backend code generation is a time-consuming activity happened on target devi...
2013 Oct 12
2
Warning: appears to have a negative number of dependencies
Hello After add some packagelist to puppet class. I get lots of warning message "appears to have a negative number of dependencies". My puppet master and agent version are 3.3.1. Here is the log out: [root@gpu022 ~]# puppet agent --test Info: Retrieving plugin Info: Loading facts in /var/lib/puppet/lib/facter/puppet_vardir.rb Info: Loading facts in
2013 Feb 01
0
[LLVMdev] [Patch][Review Requested][Compilation Time] Avoid frequent copy of elements in LoopStrengthReduce
...trengthReduce. It is observed that the BaseRegs vector size is 4 in most cases, and elements are frequently copied when it is initialized as SmallVector<const SCEV *, 2> BaseRegs. > Our benchmark results show that the compilation time performance improved by ~0.5%. > > Patch by Wan Xiaofei. > > Thanks > Sriram > <loopStrengthReduce.patch>_______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev -------------- next part -------...
2013 Oct 17
0
Error: Could not evaluate: invalid comparator for command get
...[sshd]: Dependency Augeas[sshd_config_AllowUsers] has failures: true Notice: /Stage[main]/Ssh::Server::Service/Service[sshd]: Dependency Augeas[sshd_config_AllowGroups] has failures: true Warning: /Stage[main]/Ssh::Server::Service/Service[sshd]: Skipping because of failed dependencies Best Regards Xiaofei -- You received this message because you are subscribed to the Google Groups "Puppet Users" group. To unsubscribe from this group and stop receiving emails from it, send an email to puppet-users+unsubscribe@googlegroups.com. To post to this group, send email to puppet-users@googlegroups...
2014 Jul 10
2
[LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!!
Hi Andrea    Thank you your replying.    I do like your letter. Add following to line to MipsISelLowering.cpp. As your words,   @llvm.convert.to.fp16  can compile successfully. However, the runtime is not right. +  setOperationAction(ISD::FP16_TO_FP32, MVT::f32, Expand);+  setOperationAction(ISD::FP32_TO_FP16, MVT::i32, Expand); Robin yalong at multicorewareinc.com  From: Andrea Di
2013 Jul 17
2
[LLVMdev] [Proposal] Parallelize post-IPO stage.
On Jul 17, 2013, at 4:29 PM, Shuxin Yang <shuxin.llvm at gmail.com> wrote: > On 7/17/13 4:12 PM, Nick Kledzik wrote: >> On Jul 14, 2013, at 7:07 PM, Andrew Trick <atrick at apple.com> wrote: >>> The partitioning should be deterministic. It’s just that the linker output now depends on the partitioning heuristics. As long that decision is based on the input (not the