Displaying 6 results from an estimated 6 matches for "xform_6".
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xform_1
2012 Jul 24
2
[LLVMdev] Instruction Encodings in TableGen
...t confused on how the instruction fields are populated. Perhaps I'm
just being dense, but I cannot see how SDAG operands are translated into
the encoding fields. Can someone please explain the following snippet from
the PPC back-end.
The AND instruction in PPC is defined as:
1011 def AND : XForm_6<31, 28, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB),
1012 "and $rA, $rS, $rB", IntSimple,
1013 [(set GPRC:$rA, (and GPRC:$rS, GPRC:$rB))]>;
Okay, so rA, rS, and rB are register operands.
The TableGen classes are defined as:
315 class XForm_bas...
2012 Jul 24
2
[LLVMdev] Instruction Encodings in TableGen
...> > just being dense, but I cannot see how SDAG operands are translated into
> > the encoding fields. Can someone please explain the following snippet
> from
> > the PPC back-end.
> >
> > The AND instruction in PPC is defined as:
> >
> > 1011 def AND : XForm_6<31, 28, (outs GPRC:$rA), (ins GPRC:$rS,
> GPRC:$rB),
> > 1012 "and $rA, $rS, $rB", IntSimple,
> > 1013 [(set GPRC:$rA, (and GPRC:$rS, GPRC:$rB))]>;
> >
> > Okay, so rA, rS, and rB are register operands.
> >
>...
2012 Jul 24
0
[LLVMdev] Instruction Encodings in TableGen
...ields are populated. Perhaps I'm
> just being dense, but I cannot see how SDAG operands are translated into
> the encoding fields. Can someone please explain the following snippet from
> the PPC back-end.
>
> The AND instruction in PPC is defined as:
>
> 1011 def AND : XForm_6<31, 28, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB),
> 1012 "and $rA, $rS, $rB", IntSimple,
> 1013 [(set GPRC:$rA, (and GPRC:$rS, GPRC:$rB))]>;
>
> Okay, so rA, rS, and rB are register operands.
>
> The TableGen classes are de...
2012 Jul 25
2
[LLVMdev] Instruction Encodings in TableGen
...but I cannot see how SDAG operands are translated into
>> > the encoding fields. Can someone please explain the following snippet
>> from
>> > the PPC back-end.
>> >
>> > The AND instruction in PPC is defined as:
>> >
>> > 1011 def AND : XForm_6<31, 28, (outs GPRC:$rA), (ins GPRC:$rS,
>> GPRC:$rB),
>> > 1012 "and $rA, $rS, $rB", IntSimple,
>> > 1013 [(set GPRC:$rA, (and GPRC:$rS, GPRC:$rB))]>;
>> >
>> > Okay, so rA, rS, and rB are register oper...
2012 Jul 25
0
[LLVMdev] Instruction Encodings in TableGen
...39;m
> > just being dense, but I cannot see how SDAG operands are translated into
> > the encoding fields. Can someone please explain the following snippet from
> > the PPC back-end.
> >
> > The AND instruction in PPC is defined as:
> >
> > 1011 def AND : XForm_6<31, 28, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB),
> > 1012 "and $rA, $rS, $rB", IntSimple,
> > 1013 [(set GPRC:$rA, (and GPRC:$rS, GPRC:$rB))]>;
> >
> > Okay, so rA, rS, and rB are register operands.
> >
> >...
2012 Jul 27
0
[LLVMdev] Instruction Encodings in TableGen
...are translated into the encoding fields. Can someone please
> >> > explain the following snippet
> >> from
> >> > the PPC back-end.
> >> >
> >> > The AND instruction in PPC is defined as:
> >> >
> >> > 1011 def AND : XForm_6<31, 28, (outs GPRC:$rA), (ins GPRC:$rS,
> >> GPRC:$rB),
> >> > 1012 "and $rA, $rS, $rB", IntSimple,
> >> > 1013 [(set GPRC:$rA, (and GPRC:$rS,
> >> > GPRC:$rB))]>;
> >> >
> >> &g...