search for: wmask

...version_id = qemu_get_be32(f); if (version_id > 2) return -EINVAL; - qemu_get_buffer(f, s->config, 256); + qemu_get_buffer(f, config, sizeof config); + for (i = 0; i < sizeof config; ++i) + if ((config[i] ^ s->config[i]) & s->cmask[i] & ~s->wmask[i]) + return -EINVAL; + memcpy(s->config, config, sizeof config); + pci_update_mappings(s); if (version_id >= 2) @@ -237,6 +243,18 @@ int pci_assign_devaddr(const char *addr, int *domp, int *busp, unsigned *slotp) return pci_parse_devaddr(devaddr, domp, busp, sl...

...version_id = qemu_get_be32(f); if (version_id > 2) return -EINVAL; - qemu_get_buffer(f, s->config, 256); + qemu_get_buffer(f, config, sizeof config); + for (i = 0; i < sizeof config; ++i) + if ((config[i] ^ s->config[i]) & s->cmask[i] & ~s->wmask[i]) + return -EINVAL; + memcpy(s->config, config, sizeof config); + pci_update_mappings(s); if (version_id >= 2) @@ -237,6 +243,18 @@ int pci_assign_devaddr(const char *addr, int *domp, int *busp, unsigned *slotp) return pci_parse_devaddr(devaddr, domp, busp, sl...

...MUFile *f) if (s->cap_present & ~s->cap_supported) return -EINVAL; + qemu_get_buffer(f, s->config, 256); + pci_update_mappings(s); + + if (version_id >= 2) + for (i = 0; i < 4; i ++) + s->irq_state[i] = qemu_get_be32(f); + /* Clear wmask and used bits for capabilities. + Must be restored separately, since capabilities can + be placed anywhere in config space. */ + memset(s->used, 0, PCI_CONFIG_SPACE_SIZE); + for (i = PCI_CONFIG_HEADER_SIZE; i < PCI_CONFIG_SPACE_SIZE; ++i) + s->wmask[i] = 0xff;...

...MUFile *f) if (s->cap_present & ~s->cap_supported) return -EINVAL; + qemu_get_buffer(f, s->config, 256); + pci_update_mappings(s); + + if (version_id >= 2) + for (i = 0; i < 4; i ++) + s->irq_state[i] = qemu_get_be32(f); + /* Clear wmask and used bits for capabilities. + Must be restored separately, since capabilities can + be placed anywhere in config space. */ + memset(s->used, 0, PCI_CONFIG_SPACE_SIZE); + for (i = PCI_CONFIG_HEADER_SIZE; i < PCI_CONFIG_SPACE_SIZE; ++i) + s->wmask[i] = 0xff;...

...with a per-device flag to control the number of vectors - since v4 rebased to latest bits - since v3 call to resize_region on load split patches a bit differently to address style comments by Glauber update commit message to clarify what msix_support flag does - since v2 rename mask -> wmask to avoid conflict with work by Yamahata - since v1 At Paul's suggestion, use stl_phy to decouple APIC and MSI-X implementation This uses the mask table patch that I posted previously, and which is included in the series. That patch has been slightly updated due to mask -> wmask rename. Is...

...with a per-device flag to control the number of vectors - since v4 rebased to latest bits - since v3 call to resize_region on load split patches a bit differently to address style comments by Glauber update commit message to clarify what msix_support flag does - since v2 rename mask -> wmask to avoid conflict with work by Yamahata - since v1 At Paul's suggestion, use stl_phy to decouple APIC and MSI-X implementation This uses the mask table patch that I posted previously, and which is included in the series. That patch has been slightly updated due to mask -> wmask rename. Is...

...IOLIST_INPUT] = NULL; + return list->ios[IOLIST_OUTPUT] == NULL; + } + if (list->ios[IOLIST_OUTPUT] == io) { + list->ios[IOLIST_OUTPUT] = NULL; + return list->ios[IOLIST_INPUT] == NULL; + } + + i_unreached(); + return TRUE; +} + +int iolist_events(struct io_list *list, int rmask, int wmask) +{ + int events = 0, i; + struct io *io; + + for (i = 0; i < IOLIST_IOS_PER_FD; i++) { + io = list->ios[i]; + + if (io == NULL) + continue; + + if (io->condition & IO_READ) + events |= rmask; + if (io->condition & IO_WRITE) + events |= wmask; + } + + return events; +}...

...+++++------------------ hw/pci.h | 2 ++ 2 files changed, 37 insertions(+), 18 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index e3f80d0..aa88a0b 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -386,6 +386,40 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num, *(uint32_t *)(pci_dev->wmask + addr) = cpu_to_le32(wmask); } +static void pci_unmap_region(PCIDevice *d, PCIIORegion *r) +{ + if (r->addr == -1) + return; + if (r->type & PCI_ADDRESS_SPACE_IO) { + int class; + /* NOTE: specific hack for IDE in PC case: + only one byte must be m...

...+++++------------------ hw/pci.h | 2 ++ 2 files changed, 37 insertions(+), 18 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index e3f80d0..aa88a0b 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -386,6 +386,40 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num, *(uint32_t *)(pci_dev->wmask + addr) = cpu_to_le32(wmask); } +static void pci_unmap_region(PCIDevice *d, PCIIORegion *r) +{ + if (r->addr == -1) + return; + if (r->type & PCI_ADDRESS_SPACE_IO) { + int class; + /* NOTE: specific hack for IDE in PC case: + only one byte must be m...

...++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/plugins/blur.c b/plugins/blur.c index cde18fb..0be98e9 100644 --- a/plugins/blur.c +++ b/plugins/blur.c @@ -226,7 +226,12 @@ blurPreparePaintScreen (CompScreen *s, for (w = s->windows; w; w = w->next) { - if (bs->wMask & w->type) + int type = w->type; + + if (w->type == CompWindowTypeNormalMask && w->attrib.override_redirect) + type = CompWindowTypeUnknownMask; // menu fix hack + + if (bs->wMask & type) { BLUR_WINDOW (w); -- 1.4.4.3

...+ pci_set_long(config + MSIX_TABLE_OFFSET, bar_size | bar_nr); + /* Pending bits on top of that */ + pci_set_long(config + MSIX_PBA_OFFSET, (bar_size + MSIX_PAGE_PENDING) | + bar_nr); + pdev->msix_cap = config_offset; + /* Make flags bit writeable. */ + pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability c...

...+ pci_set_long(config + MSIX_TABLE_OFFSET, bar_size | bar_nr); + /* Pending bits on top of that */ + pci_set_long(config + MSIX_PBA_OFFSET, (bar_size + MSIX_PAGE_PENDING) | + bar_nr); + pdev->msix_cap = config_offset; + /* Make flags bit writeable. */ + pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability c...

...eric support for MSI-X, adds implementation in APIC, and uses MSI-X in virtio-net. At Paul's suggestion, I use stl_phy to decouple APIC and MSI-X implementation. This uses the mask table patch that I posted previously, and which is now included in the series. -- MST Changelog: v3: mask->wmask rename Removed an unused struct definition. v2. Incorporated a minor fix pointed out by Isaku Yamahata. v1. First working version. Michael S. Tsirkin (13): qemu: make default_write_config use mask table qemu: capability bits in pci save/restore qemu: add routines to manage PCI capa...

...c support for MSI-X, adds implementation in APIC, and uses MSI-X in virtio-net. Changelog: - since v3 call to resize_region on load split patches a bit differently to address style comments by Glauber update commit message to clarify what msix_support flag does - since v2 rename mask -> wmask to avoid conflict with work by Yamahata - since v1 At Paul's suggestion, use stl_phy to decouple APIC and MSI-X implementation This uses the mask table patch that I posted previously, and which is included in the series. -- MST Michael S. Tsirkin (13): qemu: make default_write_config us...

...net. Changelog: - since v4 rebased to latest bits. rename resize_region -> resize_bar - since v3 call to resize_region on load split patches a bit differently to address style comments by Glauber update commit message to clarify what msix_support flag does - since v2 rename mask -> wmask to avoid conflict with work by Yamahata - since v1 At Paul's suggestion, use stl_phy to decouple APIC and MSI-X implementation This uses the mask table patch that I posted previously, and which is included in the series. -- MST Michael S. Tsirkin (13): qemu: make default_write_config us...

...eric support for MSI-X, adds implementation in APIC, and uses MSI-X in virtio-net. At Paul's suggestion, I use stl_phy to decouple APIC and MSI-X implementation. This uses the mask table patch that I posted previously, and which is now included in the series. -- MST Changelog: v3: mask->wmask rename Removed an unused struct definition. v2. Incorporated a minor fix pointed out by Isaku Yamahata. v1. First working version. Michael S. Tsirkin (13): qemu: make default_write_config use mask table qemu: capability bits in pci save/restore qemu: add routines to manage PCI capa...

...c support for MSI-X, adds implementation in APIC, and uses MSI-X in virtio-net. Changelog: - since v3 call to resize_region on load split patches a bit differently to address style comments by Glauber update commit message to clarify what msix_support flag does - since v2 rename mask -> wmask to avoid conflict with work by Yamahata - since v1 At Paul's suggestion, use stl_phy to decouple APIC and MSI-X implementation This uses the mask table patch that I posted previously, and which is included in the series. -- MST Michael S. Tsirkin (13): qemu: make default_write_config us...

...net. Changelog: - since v4 rebased to latest bits. rename resize_region -> resize_bar - since v3 call to resize_region on load split patches a bit differently to address style comments by Glauber update commit message to clarify what msix_support flag does - since v2 rename mask -> wmask to avoid conflict with work by Yamahata - since v1 At Paul's suggestion, use stl_phy to decouple APIC and MSI-X implementation This uses the mask table patch that I posted previously, and which is included in the series. -- MST Michael S. Tsirkin (13): qemu: make default_write_config us...

...+ pci_set_long(config + MSIX_TABLE_OFFSET, bar_size | bar_nr); + /* Pending bits on top of that */ + pci_set_long(config + MSIX_PBA_OFFSET, (bar_size + MSIX_PAGE_PENDING) | + bar_nr); + pdev->msix_cap = config_offset; + /* Make flags bit writeable. */ + pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability c...

...+ pci_set_long(config + MSIX_TABLE_OFFSET, bar_size | bar_nr); + /* Pending bits on top of that */ + pci_set_long(config + MSIX_PBA_OFFSET, (bar_size + MSIX_PAGE_PENDING) | + bar_nr); + pdev->msix_cap = config_offset; + /* Make flags bit writeable. */ + pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability c...