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vreg6
2011 Oct 21
0
[LLVMdev] Problems with live intervals and spilling when having sub registers?
Hi,
I'm having some trouble understanding if the live intervals calculated
for one of my testcases are correct or not.
I have the following instructions:
272L %vreg67:lo<def> = mv_any16 65535; R:%vreg67
288L %vreg64:hi<def> = mv_any16 16383; R:%vreg64
304L %vreg64:lo<def> = COPY %vreg67:lo; R:%vreg64,%vreg67
320L %vreg6<def> = COPY %vreg64<kill>; R:%vreg6,%vreg64
So, %vreg64, which has two (disjunct) sub registers, gets its two pa...