Displaying 10 results from an estimated 10 matches for "vreg43".
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2012 Jan 24
1
[LLVMdev] Req-sequence, partial defs
Hi,
I'm having an issue with subregisters on my target.
With a pseudo that writes to a 32 bit reg:
%vreg20<def> = toHi16_low0_pseudo %vreg2; reg32:%vreg20 hi16:%vreg2
expands to
%vreg2<def> = COPY %a2h; hi16:%vreg2
%vreg43<def> = mov 0, pred:0, pred:%noreg, %ac0<imp-use>, %ac1<imp-use>; lo16:%vreg43
%vreg20<def> = REG_SEQUENCE %vreg2, hi16, %vreg43, lo16; reg32:%vreg20 hi16:%vreg2 lo16:%vreg43
Becomes
16L %vreg20:hi16<def,undef> = COPY %a2h<kill>, %vreg20<i...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...32:%vreg40
%vreg41<def> = COPY %vreg32:sel_z; R600_Reg32:%vreg41 R600_Reg128:%vreg32
%T2_Z<def> = COPY %vreg41<kill>; R600_Reg32:%vreg41
%vreg42<def> = COPY %vreg32:sel_w; R600_Reg32:%vreg42 R600_Reg128:%vreg32
%T2_W<def> = COPY %vreg42<kill>; R600_Reg32:%vreg42
%vreg43<def> = COPY %vreg1:sel_x; R600_Reg32:%vreg43 R600_Reg128:%vreg1
%T1_X<def> = COPY %vreg43<kill>; R600_Reg32:%vreg43
%vreg44<def> = COPY %vreg1:sel_y; R600_Reg32:%vreg44 R600_Reg128:%vreg1
%T1_Y<def> = COPY %vreg44<kill>; R600_Reg32:%vreg44
%vreg45<def> = CO...
2012 Oct 25
3
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
Hi Vincent,
On 25/10/2012 18:14, Vincent Lejeune wrote:
> When examining the debug output of regalloc, it seems that joining 32bits reg also joins 128 parent reg.
>
> If I look at the :
> %vreg34<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg34 R600_Reg128:%vreg6
>
> instructions ; it gets joined to :
> 928B%vreg34<def> = COPY %vreg48:sel_y;
>
> when vreg6 and
2012 Oct 26
1
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...t;def> = COPY %vreg32:sel_z; R600_Reg32:%vreg41 R600_Reg128:%vreg32
> %T2_Z<def> = COPY %vreg41<kill>; R600_Reg32:%vreg41
> %vreg42<def> = COPY %vreg32:sel_w; R600_Reg32:%vreg42 R600_Reg128:%vreg32
> %T2_W<def> = COPY %vreg42<kill>; R600_Reg32:%vreg42
> %vreg43<def> = COPY %vreg1:sel_x; R600_Reg32:%vreg43 R600_Reg128:%vreg1
> %T1_X<def> = COPY %vreg43<kill>; R600_Reg32:%vreg43
> %vreg44<def> = COPY %vreg1:sel_y; R600_Reg32:%vreg44 R600_Reg128:%vreg1
> %T1_Y<def> = COPY %vreg44<kill>; R600_Reg32:%vreg44
> %vr...
2012 Oct 24
3
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...gt; = COPY %vreg40; R600_Reg32:%vreg40
%vreg41<def> = COPY %vreg6:sel_z; R600_Reg32:%vreg41 R600_Reg128:%vreg6
%T2_Z<def> = COPY %vreg41; R600_Reg32:%vreg41
%vreg42<def> = COPY %vreg6:sel_w; R600_Reg32:%vreg42 R600_Reg128:%vreg6
%T2_W<def> = COPY %vreg42; R600_Reg32:%vreg42
%vreg43<def> = COPY %vreg1:sel_x; R600_Reg32:%vreg43 R600_Reg128:%vreg1
%T1_X<def> = COPY %vreg43; R600_Reg32:%vreg43
%vreg44<def> = COPY %vreg1:sel_y; R600_Reg32:%vreg44 R600_Reg128:%vreg1
%T1_Y<def> = COPY %vreg44; R600_Reg32:%vreg44
%vreg45<def> = COPY %vreg1:sel_z; R600_Re...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...Reg32:%vreg40
> %vreg41<def> = COPY %vreg6:sel_z; R600_Reg32:%vreg41 R600_Reg128:%vreg6
> %T2_Z<def> = COPY %vreg41; R600_Reg32:%vreg41
> %vreg42<def> = COPY %vreg6:sel_w; R600_Reg32:%vreg42 R600_Reg128:%vreg6
> %T2_W<def> = COPY %vreg42; R600_Reg32:%vreg42
> %vreg43<def> = COPY %vreg1:sel_x; R600_Reg32:%vreg43 R600_Reg128:%vreg1
> %T1_X<def> = COPY %vreg43; R600_Reg32:%vreg43
> %vreg44<def> = COPY %vreg1:sel_y; R600_Reg32:%vreg44 R600_Reg128:%vreg1
> %T1_Y<def> = COPY %vreg44; R600_Reg32:%vreg44
> %vreg45<def> = COPY %...
2016 Aug 23
2
Help in understanding physreg LiveVariables
...ot;ltr" > -physreg X marked as a live-in for a successor MBB (A.K.A., a live-out of the current block)<br> -physreg X is a member of an allocatable reg-class<br> -the only reference to physreg X in the current block is a<strong>: %physregX<def> = COPY %vreg43<kill></strong></div>
<div dir="ltr" > </div>
<div dir="ltr" >That is the IR immediately before the Live Variables pass. The problem is that LiveVariables is marking physregX as dead, meaning that after LiveVariables, the IR above becomes:</...
2012 Oct 25
2
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...egister: %vreg41 +[672r,688r:0)
688B%T2_Z<def> = COPY %vreg41<kill>; R600_Reg32:%vreg41
704B%vreg42<def> = COPY %vreg6:sel_w<kill>; R600_Reg32:%vreg42 R600_Reg128:%vreg6
register: %vreg42 +[704r,720r:0)
720B%T2_W<def> = COPY %vreg42<kill>; R600_Reg32:%vreg42
736B%vreg43<def> = COPY %vreg1:sel_x; R600_Reg32:%vreg43 R600_Reg128:%vreg1
register: %vreg43 +[736r,752r:0)
752B%T1_X<def> = COPY %vreg43<kill>; R600_Reg32:%vreg43
768B%vreg44<def> = COPY %vreg1:sel_y; R600_Reg32:%vreg44 R600_Reg128:%vreg1
register: %vreg44 +[768r,784r:0)
784B%T1_Y<...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...> 688B%T2_Z<def> = COPY %vreg41<kill>; R600_Reg32:%vreg41
> 704B%vreg42<def> = COPY %vreg6:sel_w<kill>; R600_Reg32:%vreg42
> R600_Reg128:%vreg6
> register: %vreg42 +[704r,720r:0)
> 720B%T2_W<def> = COPY %vreg42<kill>; R600_Reg32:%vreg42
> 736B%vreg43<def> = COPY %vreg1:sel_x; R600_Reg32:%vreg43
> R600_Reg128:%vreg1
> register: %vreg43 +[736r,752r:0)
> 752B%T1_X<def> = COPY %vreg43<kill>; R600_Reg32:%vreg43
> 768B%vreg44<def> = COPY %vreg1:sel_y; R600_Reg32:%vreg44
> R600_Reg128:%vreg1
> register: %vre...
2016 Aug 23
2
Help in understanding physreg LiveVariables
...ot;ltr" > -physreg X marked as a live-in for a successor MBB (A.K.A., a live-out of the current block)<br> -physreg X is a member of an allocatable reg-class<br> -the only reference to physreg X in the current block is a<strong>: %physregX<def> = COPY %vreg43<kill></strong></div>
<div dir="ltr" > </div>
<div dir="ltr" >That is the IR immediately before the Live Variables pass. The problem is that LiveVariables is marking physregX as dead, meaning that after LiveVariables, the IR above becomes:</...