Displaying 6 results from an estimated 6 matches for "vreg36".
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2013 Feb 08
2
[LLVMdev] help with X86 DAG->DAG Instruction Selection
...nks,
-Peng
ADJCALLSTACKDOWN32 8, %ESP<imp-def,dead>, %EFLAGS<imp-def,dead>,
%ESP<imp-use> ; line 1
%vreg187<def> = COPY %ESP; GR32:%vreg187
; line 2
MOVSDmr %vreg187, 1, %noreg, 0, %noreg, %vreg36; mem:ST8[Stack]
GR32:%vreg187 FR64:%vreg36 ; line 3
%vreg188<def> = MOV32rm %vreg112, 1, %noreg, 252, %noreg; mem:LD4[%108]
GR32:%vreg188,%vreg112
%vreg189<def> = MOV32rm %vreg112, 1, %noreg, 256, %noreg; mem:LD4[%111]
GR32:%vreg189,%vreg112
%vreg190<def> = MOVSDrm...
2012 Oct 25
2
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...t; = COPY %vreg32<kill>; R600_Reg128:%vreg35,%vreg32
register: %vreg35 +[944r,976r:0)
960B%vreg35:sel_y<def> = COPY %vreg34<kill>; R600_Reg128:%vreg35 R600_Reg32:%vreg34
register: %vreg35 replace range with [944r,960r:1) RESULT: [944r,960r:1)[960r,976r:0) 0 at 960r 1 at 944r
976B%vreg36<def> = COPY %vreg35<kill>; R600_Reg128:%vreg36,%vreg35
register: %vreg36 +[976r,1024r:0)
992B%vreg36:sel_z<def> = COPY %vreg5<kill>; R600_Reg128:%vreg36 R600_Reg32:%vreg5
register: %vreg36 replace range with [976r,992r:1) RESULT: [976r,992r:1)[992r,1024r:0) 0 at 992r 1 at 9...
2013 Feb 08
0
[LLVMdev] help with X86 DAG->DAG Instruction Selection
...mp-def,dead>, %EFLAGS<imp-def,dead>, %ESP<imp-use> ; line 1
> %vreg187<def> = COPY %ESP; GR32:%vreg187 ; line 2
> MOVSDmr %vreg187, 1, %noreg, 0, %noreg, %vreg36; mem:ST8[Stack] GR32:%vreg187 FR64:%vreg36 ; line 3
> %vreg188<def> = MOV32rm %vreg112, 1, %noreg, 252, %noreg; mem:LD4[%108] GR32:%vreg188,%vreg112
> %vreg189<def> = MOV32rm %vreg112, 1, %noreg, 256, %noreg; mem:LD4[%111] GR32:%vreg189,%vreg112
> %vreg190<d...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...600_Reg128:%vreg35,%vreg32
> register: %vreg35 +[944r,976r:0)
> 960B%vreg35:sel_y<def> = COPY %vreg34<kill>; R600_Reg128:%vreg35
> R600_Reg32:%vreg34
> register: %vreg35 replace range with [944r,960r:1) RESULT:
> [944r,960r:1)[960r,976r:0) 0 at 960r 1 at 944r
> 976B%vreg36<def> = COPY %vreg35<kill>; R600_Reg128:%vreg36,%vreg35
> register: %vreg36 +[976r,1024r:0)
> 992B%vreg36:sel_z<def> = COPY %vreg5<kill>; R600_Reg128:%vreg36
> R600_Reg32:%vreg5
> register: %vreg36 replace range with [976r,992r:1) RESULT:
> [976r,992r:1)[992r...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...600_Reg32:%vreg31
> 928B%vreg34<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg34 R600_Reg128:%vreg6
> 944B%vreg35<def> = COPY %vreg32<kill>; R600_Reg128:%vreg35,%vreg32
> 960B%vreg35:sel_y<def> = COPY %vreg34<kill>; R600_Reg128:%vreg35 R600_Reg32:%vreg34
> 976B%vreg36<def> = COPY %vreg35<kill>; R600_Reg128:%vreg36,%vreg35
> 992B%vreg36:sel_z<def> = COPY %vreg5<kill>; R600_Reg128:%vreg36 R600_Reg32:%vreg5
> 1008B%vreg37<def> = COPY %vreg6:sel_w; R600_Reg32:%vreg37 R600_Reg128:%vreg6
> 1024B%vreg10<def> = COPY %vreg36&l...
2012 Oct 24
3
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...600_Reg128:%vreg32 R600_Reg32:%vreg31
928B%vreg34<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg34 R600_Reg128:%vreg6
944B%vreg35<def> = COPY %vreg32<kill>; R600_Reg128:%vreg35,%vreg32
960B%vreg35:sel_y<def> = COPY %vreg34<kill>; R600_Reg128:%vreg35 R600_Reg32:%vreg34
976B%vreg36<def> = COPY %vreg35<kill>; R600_Reg128:%vreg36,%vreg35
992B%vreg36:sel_z<def> = COPY %vreg5<kill>; R600_Reg128:%vreg36 R600_Reg32:%vreg5
1008B%vreg37<def> = COPY %vreg6:sel_w; R600_Reg32:%vreg37 R600_Reg128:%vreg6
1024B%vreg10<def> = COPY %vreg36<kill>; R60...