Displaying 2 results from an estimated 2 matches for "vreg275".
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2015 Jul 30
0
[LLVMdev] [3.7.0] Two late issues with cross compilation to mips
...1,%vreg0,%vreg270
4880B %vreg272<def> = FMUL_D32 %vreg271, %vreg259; AFGR64:%vreg272,%vreg271,%vreg259
4896B %vreg273<def> = FMUL_D32 %vreg269, %vreg259; AFGR64:%vreg273,%vreg269,%vreg259
4912B %vreg274<def> = FADD_D32 %vreg24, %vreg273; AFGR64:%vreg274,%vreg24,%vreg273
4928B %vreg275<def> = FADD_D32 %vreg274, %vreg272; AFGR64:%vreg275,%vreg274,%vreg272
4944B %D6<def> = COPY %vreg275; AFGR64:%vreg275
4960B %D7<def> = COPY %vreg260; AFGR64:%vreg260
4976B JAL <ga:@fmod>, <regmask %FP %RA %D10 %D11 %D12 %D13 %D14 %D15 %F20 %F21 %F22 %F23 %F24 %F25 %F26...
2015 Jul 30
2
[LLVMdev] [3.7.0] Two late issues with cross compilation to mips
To reduce memory consumption clobbered registers are handled with RegisterMask machine operands which contain a bitset of all registers clobbered.
- Matthias
> On Jul 29, 2015, at 3:00 PM, Daniel Sanders <daniel.sanders at imgtec.com> wrote:
>
> I believe I've identified the problem with almabench but I haven't found the root cause in the compiler yet.
>
> The