search for: vreg100

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2012 Oct 29
1
[LLVMdev] Data flow/liveness in register pairs
..... // Set upper half R0_R1<def> = pseudo-consider-register-defined-here ... = R0_R1 // Use the pair specifically with IMPLICIT_DEF, but that does not do what I thought it would. I have also thought of doing this before register allocation, using something like this: vreg100:lower_half<def,read-undef> = ... vreg100:upper_half<def,read-undef> = ... but the after the second instruction, the "lower_half" will revert to "undef" (at least according to my understanding). Having simply vreg100:lower_half<def,read-undef> = ... v...