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2005 Jan 19
0
[LLVMdev] Re: LLVM to SUIF-MACH VM binary
...make sense.
>
> -Chris
>
Sample from SUIF disassembler (done by someone else):
lda $vr10.p32 <- main.A
cvt $vr11.p32 <- $vr10.p32
add $vr12.p32 <- $vr11.p32,$vr9.s32
lod $vr13.s32 <- 0($vr12.p32)
cvt $vr8.s32 <- $vr13.s32
mul $vr6.s32 <- $vr7.s32,$vr8.s32
ldc $vr15.s32 <- 5
ldc $vr18.s32 <- 1
add $vr17.s32 <- main.i,$vr18.s32
********************
So I guess it is RISK. Lots of virtual registers, so I guess allocation isn't a
big problem. So you think the C-backend code should be able to output into
SUIFvm bytecode? I'm going to look a...
2005 Jan 18
2
[LLVMdev] Re: LLVM to SUIF-MACH VM binary
On Tue, 18 Jan 2005, John Cortes wrote:
>> Can you say a little bit about MACH-SUIF? With a brief google search, I
>> didn't turn up anything that described the architecture. Is it a RISC-like
>> machine with 32-bit instruction words?
>>
>
> It's another VM representation. I haven't really gotten to know the nitty
> gritty of the language so