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...tus: NEW Severity: enhancement Priority: P5 Component: sftp Assignee: unassigned-bugs at mindrot.org Reporter: ncdehnel at gmail.com nathan at gentooserver /media/store/Data/VM/OpenVMS/OPENKITS $ sftp -o PasswordAuthentication=yes OPENKITS at vsiftp.vmssoftware.com This is VMS Software, Inc. OpenVMS (TM) IA64 Operating System, V8.4-2L1 OPENKITS at vsiftp.vmssoftware.com's password: Connected to vsiftp.vmssoftware.com. sftp> ls ALPOPENSOURCE I64OPENSOURCE README.TXT sftp> get -r ALPOPENSOURCE Fetching /disk$guest03/OPENKITS/ALPOPENSO...

...ut those specific address spaces. I don't > see a clear way to avoid adding knowledge of the address spaces to LLVM. > I think that's the approach we'll go with, unless there are more > objections. > > On Sun, Jul 28, 2019 at 8:23 AM John Reagan > <john.reagan at vmssoftware.com <mailto:john.reagan at vmssoftware.com>> wrote: > > That is basically what we do today to provide mixed sized pointers > with > our legacy frontends.  They generate IR to our old code generator > which > has ADDR32 and ADDR64 datatypes.  We use a 6...

...far) and the infrastructure in general. I might be asking lots of simple questions, but I hope everybody can put up with me. J I also plan on submitting a paper for this fall's developer's conference. Please feel free to ask questions, etc. John Reagan John dot Reagan at vmssoftware dot com -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150114/7dd875dd/attachment.html>

Hello Paul, Thanks for the reply. Yes, I am only looking for dwarf support at the moment and planning to support both PLI/COBOL decimal types. Also thanks for the suggestion, you are right as it is going to be rare cases, so it will be better to implement a separate subclass to avoid memory overhead for others. >> (Somebody is actively working on scaled binary operations, although they

That is basically what we do today to provide mixed sized pointers with our legacy frontends. They generate IR to our old code generator which has ADDR32 and ADDR64 datatypes. We use a 64-bit address data layout and then typecast the 32-bit forms to/from the underlying 64-bit addresses. I have been warned that such rampant typecasting might interfere with certain optimizations or TBAA data. We

...lists.llvm.org > Subject: Re: [llvm-dev] [RFC] Coding Standards: "prefer `int` for, regular > arithmetic, use `unsigned` only for bitmask and when you, intend to rely > on wrapping behavior." > > > > > On Jun 13, 2019, at 9:19 AM, John Reagan <john.reagan at vmssoftware.com> > wrote: > > > > Yes. We currently build LLVM 3.4.2 on our OpenVMS Itanium box with an > > older EDG/Intel C++03 compiler to create legacy cross-compilers to our > > OpenVMS x86 box (well, VirtualBox). We do have a few tweaks to the > > relocations to acce...

Yes. We currently build LLVM 3.4.2 on our OpenVMS Itanium box with an older EDG/Intel C++03 compiler to create legacy cross-compilers to our OpenVMS x86 box (well, VirtualBox). We do have a few tweaks to the relocations to access static data always through the GOT (including CodeGen's static data). Our linker sees references to code (which might be in 64-bit space) and creates trampolines

...I >> don't see a clear way to avoid adding knowledge of the address spaces >> to LLVM. >> I think that's the approach we'll go with, unless there are more >> objections. >> >> On Sun, Jul 28, 2019 at 8:23 AM John Reagan >> <john.reagan at vmssoftware.com <mailto:john.reagan at vmssoftware.com>> wrote: >> >> That is basically what we do today to provide mixed sized >> pointers with >> our legacy frontends.  They generate IR to our old code generator >> which >> has ADDR32 and ADDR6...

We'll be doing something similar for our OpenVMS port.  Right now I'm using "AsmStreamer->GetCommentOS()" and writing to the stream at the assembler level but that gets aligned on a right-side column (the column is hardcoded) and you have to be in verbose mode.  So if you come up with something or have a quick design, post it so perhaps we can leverage each other's work. 

I really hate to dip my toe in here, because it will only reveal my total ignorance, but…. Do the "usual rules around addrspacecast" say when different address spaces can alias? I remember somebody using address spaces to represent something like special off-to-the-side device memory, which obviously could never alias main memory, whereas other uses like the 32/64-bit thing will

...but for small stack frameless functions the compiler can today express in compact unwind a combination of sub and push instructions as long as it's a fixed amount within the range that the small-stack RSP encoding can express. > On Jan 26, 2018, at 7:54 AM, John Reagan <john.reagan at vmssoftware.com> wrote: > > Here is our proposal to extend/enhance the x86-64 compact unwind > descriptors to fully describe the prologue/epilogue for asynchronous > unwinding. I believe there are missing/lacking CFI directives as well, > but I'll save that for another thread. > &gt...

Here is our proposal to extend/enhance the x86-64 compact unwind descriptors to fully describe the prologue/epilogue for asynchronous unwinding.  I believe there are missing/lacking CFI directives as well, but I'll save that for another thread. Asynchronous Compact Unwind Descriptors Ron Brender, VMS Software, Inc. Revised January 25, 2018 1  Introduction This document proposes means to