search for: vmlaq_f32

Hi, Optimizes celt_pitch_xcorr for ARM NEON floating point. Changes from RFCv3: - celt_neon_intr.c - removed warnings due to not having constant pointers - Put simpler loop to take care of corner cases. Unrolling using intrinsics was not really mapping well to what was done in celt_pitch_xcorr_arm.s - Makefile.am Removed explicit -O3 optimization - test_unit_mathops.c,

...+= 4; + XX[2] = vld1q_f32(xi); + xi += 4; + XX[3] = vld1q_f32(xi); + xi += 4; + + YY[0] = vld1q_f32(yi); + yi += 4; + YY[1] = vld1q_f32(yi); + yi += 4; + YY[2] = vld1q_f32(yi); + yi += 4; + YY[3] = vld1q_f32(yi); + yi += 4; + + SUMM = vmlaq_f32(SUMM, YY[0], XX[0]); + SUMM = vmlaq_f32(SUMM, YY[1], XX[1]); + SUMM = vmlaq_f32(SUMM, YY[2], XX[2]); + SUMM = vmlaq_f32(SUMM, YY[3], XX[3]); + len -= 16; + } + + /* Work on 8 values */ + if (len >= 8) { + XX[0] = vld1q_f32(xi); + xi += 4; + XX[1] = vld1q_...

...+= 4; + XX[2] = vld1q_f32(xi); + xi += 4; + XX[3] = vld1q_f32(xi); + xi += 4; + + YY[0] = vld1q_f32(yi); + yi += 4; + YY[1] = vld1q_f32(yi); + yi += 4; + YY[2] = vld1q_f32(yi); + yi += 4; + YY[3] = vld1q_f32(yi); + yi += 4; + + SUMM = vmlaq_f32(SUMM, YY[0], XX[0]); + SUMM = vmlaq_f32(SUMM, YY[1], XX[1]); + SUMM = vmlaq_f32(SUMM, YY[2], XX[2]); + SUMM = vmlaq_f32(SUMM, YY[3], XX[3]); + len -= 16; + } + + /* Work on 8 values */ + if (len >= 8) { + XX[0] = vld1q_f32(xi); + xi += 4; + XX[1] = vld1q_...

Should call celt_inner_prod(). --- celt/bands.c | 7 ++++--- celt/bands.h | 2 +- celt/celt_encoder.c | 6 +++--- celt/pitch.c | 2 +- src/opus_multistream_encoder.c | 2 +- 5 files changed, 10 insertions(+), 9 deletions(-) diff --git a/celt/bands.c b/celt/bands.c index bbe8a4c..1ab24aa 100644 --- a/celt/bands.c +++ b/celt/bands.c

Hi, Optimizes celt_pitch_xcorr for floating point. Changes from RFCv2: - Changes recommended by Timothy for celt_neon_intr.c everything except, left the unrolled loop still unrolled - configure.ac - use AC_LINK_IFELSE instead of AC_COMPILE_IFELSE - Moved compile flags into Makefile.am - OPUS_ARM_NEON_INR --> typo --> OPUS_ARM_NEON_INTR Viswanath Puttagunta (1): armv7:

...X[3] = vld1q_f32(xi); > + xi += 4; > + > + YY[0] = vld1q_f32(yi); > + yi += 4; > + YY[1] = vld1q_f32(yi); > + yi += 4; > + YY[2] = vld1q_f32(yi); > + yi += 4; > + YY[3] = vld1q_f32(yi); > + yi += 4; > + > + SUMM = vmlaq_f32(SUMM, YY[0], XX[0]); > + SUMM = vmlaq_f32(SUMM, YY[1], XX[1]); > + SUMM = vmlaq_f32(SUMM, YY[2], XX[2]); > + SUMM = vmlaq_f32(SUMM, YY[3], XX[3]); > + len -= 16; > + } > + > + /* Work on 8 values */ > + if (len >= 8) { > + XX[0] = vld1q_f...

...vld1q_dup_f32(xi++); > + XX[1] = vld1q_dup_f32(xi++); > + XX[2] = vld1q_dup_f32(xi++); > + XX[3] = vld1q_dup_f32(xi++); Don't do this. Do a single load and use vmlaq_lane_f32() to multiply by each value. That should cut at least 5 cycles out of this loop. > + > + SUMM[0] = vmlaq_f32(SUMM[0], XX[0], YY[0]); > + SUMM[1] = vmlaq_f32(SUMM[1], XX[1], YY[1]); > + SUMM[2] = vmlaq_f32(SUMM[2], XX[2], YY[2]); > + SUMM[3] = vmlaq_f32(SUMM[3], XX[3], YY[3]); > + YY[0] = YY[4]; > + } > + > + /* Handle remaining values max iterations = 3 */ > + for (j = 0; j &lt...

...+= 4; + XX[2] = vld1q_f32(xi); + xi += 4; + XX[3] = vld1q_f32(xi); + xi += 4; + + YY[0] = vld1q_f32(yi); + yi += 4; + YY[1] = vld1q_f32(yi); + yi += 4; + YY[2] = vld1q_f32(yi); + yi += 4; + YY[3] = vld1q_f32(yi); + yi += 4; + + SUMM = vmlaq_f32(SUMM, YY[0], XX[0]); + SUMM = vmlaq_f32(SUMM, YY[1], XX[1]); + SUMM = vmlaq_f32(SUMM, YY[2], XX[2]); + SUMM = vmlaq_f32(SUMM, YY[3], XX[3]); + len -= 16; + } + + /* Work on 8 values per cycle */ + while (len >= 8) { + XX[0] = vld1q_f32(xi); + xi += 4; + X...

From: Viswanath Puttagunta <viswanath.puttagunta at linaro.org> Hi, Optimizes celt_pitch_xcorr for floating point. Changes from RFCv1: - Rebased on top of commit aad281878: Fix celt_pitch_xcorr_c signature. which got rid of ugly code around CELT_PITCH_XCORR_IMPL passing of "arch" parameter. - Unified with --enable-intrinsics used by x86 - Modified algorithm to be more

...+ XX[2] = vld1q_dup_f32(xi++); >> + XX[3] = vld1q_dup_f32(xi++); > > Don't do this. Do a single load and use vmlaq_lane_f32() to multiply by > each value. That should cut at least 5 cycles out of this loop. > >> + >> + SUMM[0] = vmlaq_f32(SUMM[0], XX[0], YY[0]); >> + SUMM[1] = vmlaq_f32(SUMM[1], XX[1], YY[1]); >> + SUMM[2] = vmlaq_f32(SUMM[2], XX[2], YY[2]); >> + SUMM[3] = vmlaq_f32(SUMM[3], XX[3], YY[3]); >> + YY[0] = YY[4]; >> + } >> + >>...

Hi, Optimizes celt_pitch_xcorr for floating point. Changes from RFCv1: - Rebased on top of commit aad281878: Fix celt_pitch_xcorr_c signature. which got rid of ugly code around CELT_PITCH_XCORR_IMPL passing of "arch" parameter. - Unified with --enable-intrinsics used by x86 - Modified algorithm to be more in-line with algorithm in celt_pitch_xcorr_arm.s Viswanath Puttagunta

Hello, I received feedback from engineers working on NE10 [1] that it would be better to use NE10 [1] for FFT optimizations for opus use cases. However, these FFT patches are currently in review and haven't been integrated into NE10 yet. While the FFT functions in NE10 are getting baked, I wanted to optimize the celt_pitch_xcorr (floating point only) and use it to introduce ARM NEON

...+ yi += 4; + YY[4] = vld1q_f32(yi); + YY[1] = vextq_f32(YY[0], YY[4], 1); + YY[2] = vextq_f32(YY[0], YY[4], 2); + YY[3] = vextq_f32(YY[0], YY[4], 3); + + XX[0] = vld1q_dup_f32(xi++); + XX[1] = vld1q_dup_f32(xi++); + XX[2] = vld1q_dup_f32(xi++); + XX[3] = vld1q_dup_f32(xi++); + + SUMM[0] = vmlaq_f32(SUMM[0], XX[0], YY[0]); + SUMM[1] = vmlaq_f32(SUMM[1], XX[1], YY[1]); + SUMM[2] = vmlaq_f32(SUMM[2], XX[2], YY[2]); + SUMM[3] = vmlaq_f32(SUMM[3], XX[3], YY[3]); + YY[0] = YY[4]; + } + + /* Handle remaining values max iterations = 3 */ + for (j = 0; j < cr; j++) { + YY[0] = vld1q_f32(yi++);...

...tions(+), 9 deletions(-) diff --git a/configure.ac b/configure.ac index a67aa37..c722556 100644 --- a/configure.ac +++ b/configure.ac @@ -472,6 +472,7 @@ AS_IF([test x"$enable_intrinsics" = x"yes"],[ [[ static float32x4_t A0, A1, SUMM; SUMM = vmlaq_f32(SUMM, A0, A1); + return (int)vgetq_lane_f32(SUMM, 0); ]] ) AS_IF([test x"$OPUS_ARM_MAY_HAVE_NEON_INTR" = x"1" && test x"$OPUS_ARM_PRESUME_NEON_INTR" != x"1"], @@ -521,10 +522,13 @@ AS_IF([test x"$enable_intrinsi...

...eletion(-) diff --git a/configure.ac b/configure.ac index fca746f..f945b9a 100644 --- a/configure.ac +++ b/configure.ac @@ -471,7 +471,7 @@ AS_IF([test x"$enable_intrinsics" = x"yes"],[ ]], [[ static float32x4_t A0, A1, SUMM; - SUMM = vmlaq_f32(SUMM, A0, A1); + SUMM = vmlaq_lane_f32(SUMM, A0, vget_low_f32(A1), 0); return (int)vgetq_lane_f32(SUMM, 0); ]] ) -- 2.9.3

...able_intrinsics" = x"yes"],[ intrinsics_support="" AS_CASE([$host_cpu], - [arm*], + [arm*|aarch64], [ cpu_arm=yes OPUS_CHECK_INTRINSICS( @@ -459,55 +459,50 @@ AS_IF([test x"$enable_intrinsics" = x"yes"],[ SUMM = vmlaq_f32(SUMM, A0, A1); ]] ) - AS_IF([test x"$OPUS_ARM_MAY_HAVE_NEON_INTR" = x"1" && test x"$OPUS_ARM_PRESUME_NEON_INTR" != x"1"], - [ - OPUS_ARM_NEON_INTR_CFLAGS="$ARM_NEON_INTR_CFLAGS" - AC_SUB...

libvorbis does not currently have any simd/vectorization. Following patches add generic framework for simd/vectorization and on top, add ARM-NEON simd vectorization using intrinsics. I was able to get over 34% performance improvement on my Beaglebone Black which is single Cortex-A8 based CPU. You can find more information on metrics and procedure I used to measure at

...save_CFLAGS="$CFLAGS"; CFLAGS="-mfpu=neon $CFLAGS" - AC_LINK_IFELSE( - [ - AC_LANG_PROGRAM( - [[#include <arm_neon.h> - ]], - [[ - static float32x4_t A[2], SUMM; - SUMM = vmlaq_f32(SUMM, A[0], A[1]); - ]] - ) - ],[ - OPUS_ARM_NEON_INTR=1 - AC_MSG_RESULT([yes]) - ],[ - OPUS_ARM_NEON_INTR=0 - AC_MSG_RESULT([no]) - ] + OPUS_CHECK_INTRINSICS( + [ARM Neon], + [$ARM_NEO...

...save_CFLAGS="$CFLAGS"; CFLAGS="-mfpu=neon $CFLAGS" - AC_LINK_IFELSE( - [ - AC_LANG_PROGRAM( - [[#include <arm_neon.h> - ]], - [[ - static float32x4_t A[2], SUMM; - SUMM = vmlaq_f32(SUMM, A[0], A[1]); - ]] - ) - ],[ - OPUS_ARM_NEON_INTR=1 - AC_MSG_RESULT([yes]) - ],[ - OPUS_ARM_NEON_INTR=0 - AC_MSG_RESULT([no]) - ] + OPUS_CHECK_INTRINSICS( + [ARM Neon], + [$ARM_NEO...

The attached patch cleans up Opus's x86 intrinsics configury. It: * Makes ?enable-intrinsics work with clang and other non-GCC compilers * Enables RTCD for the floating-point-mode SSE code in Celt. * Disables use of RTCD in cases where the compiler targets an instruction set by default. * Enables the SSE4.1 Silk optimizations that apply to the common parts of Silk when Opus is built in