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Patch 1 removes CONFIG_SMP Patch 2 removes separate smp_{,r,w}mb()s as a result of patch 1 Patch 4 removes __ia64__ defines from the x86 arch tree Patch 3 is related to patch 4 and changes the VIOAPIC to emulate version 0x20 as a performance gain. It preceeds Patch 4 so as to be more clear about the functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

The following 5 patches are re-submissions of the vt-d patch. This set of patches has been tested against cs# 15080 and is now much more mature and tested against more environments than the original patch. Specifically, we have successfully tested the patch with following environements: - 32/64-bit Linux HVM guest - 32-bit Windows XP/Vista (64-bit should work but did not test) -

...ndled by next vm entry Refer to Intel SDM vol3, 29.6 to get more information. Yang Zhang (4): VMX: Detect posted interrupt capability VMX: Turn on posted interrupt bit in vmcs VMX: Add posted interrupt supporting VMX: Use posted interrupt to deliver virutal interrupt xen/arch/x86/hvm/vioapic.c | 4 +- xen/arch/x86/hvm/vlapic.c | 19 +++++- xen/arch/x86/hvm/vmsi.c | 5 +- xen/arch/x86/hvm/vmx/vmcs.c | 18 +++++- xen/arch/x86/hvm/vmx/vmx.c | 81 ++++++++++++++++++++++++ xen/...

If HVM guest Fedora 7 uses PIT and lapic timer, it can''t boot or install. The cause is: At some point, Fedora 7 disables PIT interrupt by "vioapic.redirtbl[2].mask = 1, vpic.imr.bit0 = 0 (unmasked), vlapic.lvt[LINT0].mask = 1", and enables vlapic timer interrupt generating; In vmx_intr_assist() -> pt_update_irq(), we always choose IRQ0 rather than vlapic timer interrupt, because: 1) is_isa_irq_masked(v, 0) returns false due to vpic.im...

.... Signed-off-by: Avi Kivity <avi at qumranet.com> diff --git a/arch/x86/kvm/irq.c b/arch/x86/kvm/irq.c index 0d9e552..9091195 100644 --- a/arch/x86/kvm/irq.c +++ b/arch/x86/kvm/irq.c @@ -111,3 +111,25 @@ void kvm_set_irq(struct kvm *kvm, int irq, int level) kvm_ioapic_set_irq(kvm->arch.vioapic, irq, level); kvm_pic_set_irq(pic_irqchip(kvm), irq, level); } + +void kvm_notify_acked_irq(struct kvm *kvm, unsigned gsi) +{ + struct kvm_irq_ack_notifier *kian; + struct hlist_node *n; + + hlist_for_each_entry(kian, n, &kvm->arch.irq_ack_notifier_list, link) + if (kian->gsi == gsi)...

The main change from the patches I sent out earlier this week is support for guests that use the PIC. A callback for PIC irq ack handling is also introduced. Currently, there's no mechanism to register/unregister callers to the irq ack callbacks, but they can be added when there's more than one user for the functionality. Please review.

The main change from the patches I sent out earlier this week is support for guests that use the PIC. A callback for PIC irq ack handling is also introduced. Currently, there's no mechanism to register/unregister callers to the irq ack callbacks, but they can be added when there's more than one user for the functionality. Please review.

Keir, It''s a resending patch for the timeout mechanism to deal with the shared interrupt issue for vt-d enabled hvm guest. We modify the patch following your comments last time and make some other small fix: 1) We don''t touch the locking around the hvm_dpci_eoi(). 2) Remove the HZ from the TIME_OUT_PERIOD macro which may confuse others. 3) Add some

x64 SMP Vista HVM guest uses HPET as the main system timer, and it uses physical destination mode with broadcast to deliver the interrupts generated by HPET. In current code, timer interrupts are injected only to VCPU0 in vioapic.c, but this doesn''t satisfy x64 SMP Vista -- when it boots, it complains "a clock interrupt was not received on a secondary processor within the allocated time interval" with Bug Check 0x101. The attached patch fixes the issue. -- Dexuan Signed-off-by: Dexuan Cui <dexuan.cui...

int.patch: - Supports only level-triggered interrupts. Edge interrupts support will be added shortly (should be fairly simple) - Change polarity trick: in order to reflect the external device''s assertion state, the ioapic pin gets its polarity changed whenever an interrupt occur. So an interrupt is generated when the _external_ line is asserted (then,

...should be updated if any pending IRRs EOI exit bitmap controls whether an EOI write should cause VM-Exit. If set, a trap-like induced EOI VM-Exit is triggered. The approach here is to manipulate EOI exit bitmap based on value of TMR. Level triggered irq requires a hook in vLAPIC EOI write, so that vIOAPIC EOI is triggered and emulated Signed-off-by: Gang Wei <gang.wei@intel.com> Signed-off-by: Yang Zhang <yang.z.zhang@intel.com> Signed-off-by: Jiongxi Li <jiongxi.li@intel.com> diff -r 7c6844dd4a0d xen/arch/x86/hvm/vlapic.c --- a/xen/arch/x86/hvm/vlapic.c Tue Sep 11 15:34:36 2012...

...unstable/xen/arch/x86/hvm/vmx/x86_64'' ld -m elf_x86_64 -r -o built_in.o io.o vmcs.o vmx.o x86_64/built_in.o make[7]: Leaving directory `/home/test1/xen-unstable/xen/arch/x86/hvm/vmx'' ld -m elf_x86_64 -r -o built_in.o hvm.o i8254.o i8259.o instrlen.o intercept.o io.o platform.o vioapic.o vlapic.o svm/built_in.o vmx/built_in.o make[6]: Leaving directory `/home/test1/xen-unstable/xen/arch/x86/hvm'' make -f /home/test1/xen-unstable/xen/Rules.mk -C mm built_in.o make[6]: Entering directory `/home/test1/xen-unstable/xen/arch/x86/mm'' make -f /home/test1/xen-unstable/xe...

This patchset implements the KVM part of the synthetic interrupt controller (SynIC) which is a building block of the Hyper-V paravirtualized device bus (vmbus). SynIC is a lapic extension, which is controlled via MSRs and maintains for each vCPU - 16 synthetic interrupt "lines" (SINT's); each can be configured to trigger a specific interrupt vector optionally with auto-EOI

This patchset implements the KVM part of the synthetic interrupt controller (SynIC) which is a building block of the Hyper-V paravirtualized device bus (vmbus). SynIC is a lapic extension, which is controlled via MSRs and maintains for each vCPU - 16 synthetic interrupt "lines" (SINT's); each can be configured to trigger a specific interrupt vector optionally with auto-EOI