search for: ioapic

...After booting the command "xm dmesg" shows the following errors: (XEN) ERROR: Unable to locate IOAPIC for GSI 13 (XEN) No IOAPIC for GSI 13...

The main change from the patches I sent out earlier this week is support for guests that use the PIC. A callback for PIC irq ack handling is also introduced. Currently, there's no mechanism to register/unregister callers to the irq ack callbacks, but they can be added when there's more than one user for the functionality. Please review.

The main change from the patches I sent out earlier this week is support for guests that use the PIC. A callback for PIC irq ack handling is also introduced. Currently, there's no mechanism to register/unregister callers to the irq ack callbacks, but they can be added when there's more than one user for the functionality. Please review.

Wei, Quick question: Am I reading the code correctly, that even with per-device interrupt remap tables, that GSIs are accounted to the intremap table of the corresponding IOAPIC, presumably because the IOMMU sees interrupts generated as GSIs as coming from the IOAPIC? In that case, then we need all devices sharing the same IOAPIC must not have any vector collisions. Is that correct? -George _______________________________________________ Xen-devel mailing list Xen-dev...

This patchset introduces PCI passthrough support for KVM. This has been tested with an Ethernet device. The device is seen in the guest and interrupts are generated. However, no data transfer can take place unless pvdma or reserved-ram is used. The patches for pvdma will be available shortly. Sharing of interrupt line for the PCI device on the host side will cause slowness (and / or some

This patchset introduces PCI passthrough support for KVM. This has been tested with an Ethernet device. The device is seen in the guest and interrupts are generated. However, no data transfer can take place unless pvdma or reserved-ram is used. The patches for pvdma will be available shortly. Sharing of interrupt line for the PCI device on the host side will cause slowness (and / or some

...880008e77000 size=32768 [ 0.146621] Placing 64MB Xen software IO TLB between ffff880004e17000 - ffff880008e17000 [ 0.146623] Xen software IO TLB at phys 0x4e17000 - 0x8e17000 [ 0.158797] xen: registering gsi 0 triggering 1 polarity 0 [ 0.158804] xen: --> irq=0 [ 0.158806] xen_set_ioapic_routing: irq 0 gsi 0 vector 240 ioapic 0 pin 0 triggering 0 polarity 0 [ 0.158818] xen: registering gsi 1 triggering 1 polarity 0 [ 0.158821] xen: --> irq=1 [ 0.158823] xen_set_ioapic_routing: irq 1 gsi 1 vector 32 ioapic 0 pin 1 triggering 0 polarity 0 [ 0.158828] xen: registering...

...i_id[0x00] lapic_id[0x00] enabled) (XEN) Processor #0 15:5 APIC version 16 (XEN) ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled) (XEN) Processor #1 15:5 APIC version 16 (XEN) ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1]) (XEN) ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) (XEN) ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0]) (XEN) IOAPIC[0]: apic_id 2, version 17, address 0xfec00000, GSI 0-23 (XEN) ACPI: IOAPIC (id[0x03] address[0xc0000000] gsi_base[24]) (XEN) IOAPIC[1]: apic_id 3, version 17, address 0xc0000000, GSI 24-27 (XEN) ACPI: IOAPIC (id[0x04] address[0xc0001000] gsi_b...

For IOAPIC interrupt remapping, it only needs to remap ioapci RTE, should not remap other IOAPIC registers, which are IOAPIC ID, VERSION and Arbitration ID. This patch adds the check for this and only remap ioapci RTE. Signed-off-by: Anthony Xu <anthony.xu@intel.com> Signed-off-by: Weidong Han <weid...

I have the same motherboard. The chipset has 2 IOAPICs: one in the NB (00:00.1), and another in the SB (00:14.0). As currently configured by the BIOS, the NB IOAPIC is _entirely_ disabled, with only the SB IOAPIC enabled and configured. From 48693.pdf, it would seem that the NB is improperly configured, as 6.4.1 recommends that "The IOAPIC sho...

...linuz-2.6.32-5-amd64 vmlinuz-2.6.32-5-xen-amd64 As you can see, distributions are the same, the latter differs by loading xen stuff. When booting the xen kernel (vmlinuz-2.6.32-5-xen-amd64) I noticed a problem which does not occur in the non xen kernel (vmlinuz-2.6.32-5-amd64). [ 0.000000] IOAPIC[0]: apic_id 0, version 0, address 0xfec00000, GSI 0-0 [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) [ 0.000000] ERROR: Unable to locate IOAPIC for GSI 2 [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) [ 0.000000] ERROR: Unable to locate IOAP...

...0x01] enabled) [ 0.000000] ACPI: LAPIC (acpi_id[0x03] lapic_id[0x02] enabled) [ 0.000000] ACPI: LAPIC (acpi_id[0x04] lapic_id[0x03] enabled) [ 0.000000] ACPI: LAPIC (acpi_id[0x05] lapic_id[0x04] enabled) [ 0.000000] ACPI: LAPIC (acpi_id[0x06] lapic_id[0x05] enabled) [ 0.000000] ACPI: IOAPIC (id[0x06] address[0xfec00000] gsi_base[0]) [ 0.000000] IOAPIC[0]: apic_id 6, version 33, address 0xfec00000, GSI 0-23 [ 0.000000] ACPI: IOAPIC (id[0x07] address[0xfec20000] gsi_base[24]) [ 0.000000] IOAPIC[1]: apic_id 7, version 33, address 0xfec20000, GSI 24- [ 64.598628] INFO: rcu_pree...

I'm running CentOS 5.1 with all updates, and the xen kernel. For some reason the OS is not seeing the full amount of ram. #uname -a Linux CentOS-VM-A 2.6.18-53.1.21.el5xen #1 SMP Tue May 20 10:03:27 EDT 2008 x86_64 x86_64 x86_64 GNU/Linux # free total used free shared buffers cached Mem: 6104064 3445136 2658928 0 1412236

has anyone seen this before with 4.7-RELEASE on an SMP motherboard? It happened once on one boot, not seen it before or since on the same system. This is a 1U 2x 2.8GHz XEON system with 10 Intel 'em' devices. Programming 24 pins in IOAPIC #0 IOAPIC #0 intpin 2 -> irq 0 Programming 24 pins in IOAPIC #1 Programming 24 pins in IOAPIC #2 AP #2 (PHY# 1) failed! panic y/n? [y] ... FreeBSD/SMP: Multiprocessor motherboard I pressed 'n', and it continued normally (I think).

...M> Hyperthreading: 2 logical CPUs real memory = 536805376 (524224K bytes) avail memory = 516759552 (504648K bytes) Changing APIC ID for IO APIC #0 from 0 to 2 on chip Changing APIC ID for IO APIC #1 from 0 to 3 on chip Changing APIC ID for IO APIC #2 from 0 to 4 on chip Programming 16 pins in IOAPIC #0 IOAPIC #0 intpin 2 -> irq 0 Programming 16 pins in IOAPIC #1 Programming 16 pins in IOAPIC #2 FreeBSD/SMP: Multiprocessor motherboard: 2 CPUs cpu0 (BSP): apic id: 0, version: 0x00050014, at 0xfee00000 cpu1 (AP): apic id: 1, version: 0x00050014, at 0xfee00000 io0 (APIC): apic id: 2, ver...

...0x0e] enabled) (XEN) Processor #14 15:3 APIC version 20 (XEN) ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1]) (XEN) ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) (XEN) ACPI: LAPIC_NMI (acpi_id[0x02] high edge lint[0x1]) (XEN) ACPI: LAPIC_NMI (acpi_id[0x03] high edge lint[0x1]) (XEN) ACPI: IOAPIC (id[0x00] address[0xfec00000] gsi_base[0]) (XEN) IOAPIC[0]: apic_id 0, version 32, address 0xfec00000, GSI 0-23 (XEN) ACPI: IOAPIC (id[0x0a] address[0xfec04000] gsi_base[72]) (XEN) IOAPIC[1]: apic_id 10, version 32, address 0xfec04000, GSI 72-95 (XEN) ACPI: IOAPIC (id[0x0b] address[0xfec05000] gsi_...

...PIC (acpi_id[0x02] lapic_id[0x01] enabled) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x07] enabled) ACPI: LAPIC_NMI (acpi_id[0x00] dfl dfl lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x06] dfl dfl lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x01] dfl dfl lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x07] dfl dfl lint[0x1]) ACPI: IOAPIC (id[0x0e] address[0xfec00000] gsi_base[0]) IOAPIC[0]: apic_id 14, version 17, address 0xfec00000, GSI 0-15 ACPI: IOAPIC (id[0x0d] address[0xfec01000] gsi_base[16]) IOAPIC[1]: apic_id 13, version 17, address 0xfec01000, GSI 16-31 ACPI: IOAPIC (id[0x0c] address[0xfec02000] gsi_base[32]) IOAPIC[2]: ap...

From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> This patch add an additional logic to check for the often case when the special->handle is not initialized due to firmware bugs. but the special->usedid is correct. If users overide this using the command line option ivrs_ioapic, then it should use the value instead. --- This patch is supposed to follow the patches: [Xen-devel] [PATCH RFC 2/2] AMD IOMMU: allow command line overrides for broken IVRS tables Changes in V2: - Fix logic to match the special->used_id with the value provided by users. xen/drivers/passthrou...

...686-class CPU) Origin = "GenuineIntel" Id = 0x686 Stepping = 6 Features=0x383fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA, CMOV,PAT,PSE36,MMX,FXSR,SSE> real memory = 1207943168 (1179632K bytes) avail memory = 1168994304 (1141596K bytes) Programming 16 pins in IOAPIC #0 IOAPIC #0 intpin 2 -> irq 0 Programming 16 pins in IOAPIC #1 IOAPIC #1 intpin 10 -> irq 5 FreeBSD/SMP: Multiprocessor motherboard: 2 CPUs cpu0 (BSP): apic id: 1, version: 0x00040011, at 0xfee00000 cpu1 (AP): apic id: 0, version: 0x00040011, at 0xfee00000 io0 (APIC): apic id: 14, vers...

...<b28>,ACC,<b31 >> real memory = 2147418112 (2097088K bytes) avail memory = 2088574976 (2039624K bytes) Changing APIC ID for IO APIC #0 from 0 to 4 on chip Changing APIC ID for IO APIC #1 from 0 to 5 on chip Changing APIC ID for IO APIC #2 from 0 to 6 on chip Programming 16 pins in IOAPIC #0 IOAPIC #0 intpin 2 -> irq 0 Programming 16 pins in IOAPIC #1 Programming 16 pins in IOAPIC #2 FreeBSD/SMP: Multiprocessor motherboard cpu0 (BSP): apic id: 0, version: 0x00050014, at 0xfee00000 cpu1 (AP): apic id: 2, version: 0x00050014, at 0xfee00000 io0 (APIC): apic id: 4, version:...