search for: vinceh

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2015 Apr 17
4
[PATCH 2/6] instmem/gk20a: refer to IOMMU physical translation bit
On Thu, Apr 16, 2015 at 8:06 PM, Vince Hsu <vinceh at nvidia.com> wrote: > Instead of hard-coding the translation bit in subdev driver, we refer to > the platform data. > > Signed-off-by: Vince Hsu <vinceh at nvidia.com> > --- > drm/nouveau/nvkm/subdev/instmem/gk20a.c | 13 +++++++++---- > 1 file changed, 9 insertions...
2014 Nov 29
1
[RESEND PATCH nouveau 2/3] volt: allow non-bios voltage scaling
On Fri, Nov 28, 2014 at 8:12 PM, Vince Hsu <vinceh at nvidia.com> wrote: > Signed-off-by: Vince Hsu <vinceh at nvidia.com> Make sure you always write a short summary for your patches, even if the title sounds sufficient. At the very least this patch makes the code easier to read, so: Acked-by: Alexandre Courbot <acourbot at nvidia...
2015 Apr 17
3
[PATCH 4/6] drm: enable big page mapping for small pages when IOMMU is available
On Thu, Apr 16, 2015 at 8:06 PM, Vince Hsu <vinceh at nvidia.com> wrote: > Some platforms have IOMMU to map non-contiguous physical memory into > contiguous GPU virtual address. We can use this feature to enable big pages > mapping on scattered small pages. To achieve that, we also need changes in > subdev/mmu as well. > > Sign...
2014 Dec 23
2
[PATCH V2 2/4] pwr: make nouveau_pwr_pgob() non-static
...11 PM, Vince Hsu wrote: > The platform device does not use the common nouveau_pwr_init() to initialize > the PWR, but it does need the .prob() be assigned to avoid NULL pointer > dereference in graph/nve4.c. s/prob/pgob/ :-( Will fix in next version. > > Signed-off-by: Vince Hsu <vinceh at nvidia.com> > --- > > v2: this patch is added since v2. (v1 is the RFC actually) > > nvkm/subdev/pwr/base.c | 2 +- > nvkm/subdev/pwr/priv.h | 1 + > 2 files changed, 2 insertions(+), 1 deletion(-) > > diff --git a/nvkm/subdev/pwr/base.c b/nvkm/subdev/pwr/base.c...
2014 Dec 23
18
[PATCH 0/11] Add suspend/resume support for GK20A
Hi, This series includes some pieces of fixes to complete the GK20A power on/off sequences and add the suspend/resume support. The patches 1/11 - 4/11 are based on the linux-next-20141219. The patches 5/11 - 11/11 are based on the branch "linux-3.19" of Ben Skeggs's tree (http://cgit.freedesktop.org/~darktama/nouveau). Thanks, Vince Vince Hsu (4): (linux-next-20141219) ARM:
2015 Nov 16
1
[PATCH] fifo/gk104: fix engine status register offset
The offset should be 8 on Kepler and later. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- drm/nouveau/nvkm/engine/fifo/gk104.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Hi, According to the header[1] the offset for engine status register is 8. [1] https://github.com/kfractal/nouveau/blob/hwref/drm/nouveau/include/nvkm/hwref/gk104/fifo.h Thanks, Vin...
2015 Jan 07
1
[PATCH V2 1/4] clk: allow non-blocking for nouveau_clock_astate()
On Wed, Jan 7, 2015 at 3:10 PM, Vince Hsu <vinceh at nvidia.com> wrote: > Hello Ben and Martin, > > Any comments for this series? Hey Vince, Ah sorry, I thought my comment on the other patch indicated I was fine with it. I'll merge them now so they don't get lost :) Thanks, Ben. > > Thanks, > Vince > > > O...
2015 Apr 16
15
[PATCH 0/6] map big page by platform IOMMU
Hi, Generally the the imported buffers which has memory type TTM_PL_TT are mapped as small pages probably due to lack of big page allocation. But the platform device which also use memory type TTM_PL_TT, like GK20A, can *allocate* big page though the IOMMU hardware inside the SoC. This is a try to map the imported buffers as big pages in GMMU by the platform IOMMU. With some preparation work to
2014 Nov 28
8
[RESEND V2 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info for module use
Some Tegra drivers might be complied as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- v2: add more description why we need this patch drivers/soc/tegra/fuse/fuse-tegra.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index 11a5043959dc..011a3363c265 100644 --- a/drivers/soc/tegra/...
2014 Dec 22
7
[PATCH V2 1/4] clk: allow non-blocking for nouveau_clock_astate()
...om inetrrupt context. So we must ensure that this function can be atomic in that condition. This patch adds one parameter which is subsequently passed to nouveau_pstate_calc(). Therefore we can choose whether we want to wait for the pstate work's completion or not. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- v2: none. (v1 is the RFC actually) nvkm/include/subdev/clock.h | 2 +- nvkm/subdev/clock/base.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/nvkm/include/subdev/clock.h b/nvkm/include/subdev/clock.h index 36ed035d4d42..6c36f0e4385b 100644 ---...
2015 Apr 17
2
[PATCH 0/6] map big page by platform IOMMU
On 04/17/2015 02:25 PM, Alexandre Courbot wrote: > On Thu, Apr 16, 2015 at 8:06 PM, Vince Hsu <vinceh at nvidia.com> wrote: >> Hi, >> >> Generally the the imported buffers which has memory type TTM_PL_TT are >> mapped as small pages probably due to lack of big page allocation. But the >> platform device which also use memory type TTM_PL_TT, like GK20A, can > Nit:...
2015 Apr 17
3
[PATCH 1/6] platform: specify the IOMMU physical translation bit
On Thu, Apr 16, 2015 at 8:06 PM, Vince Hsu <vinceh at nvidia.com> wrote: > The IOMMU physical translation bit might vary with different SoCs. So add > a variable to specify this bit for GK20A. > > Signed-off-by: Vince Hsu <vinceh at nvidia.com> > --- > drm/nouveau/nouveau_platform.c | 19 +++++++++++++++++++ > drm/nou...
2014 Dec 23
1
[PATCH nouveau 08/11] instmem: add dummy support for GK20A
On Tue, Dec 23, 2014 at 5:40 AM, Vince Hsu <vinceh at nvidia.com> wrote: > This is a workaround to avoid the instmem backup/restore during the suspend > and resume process in nv50 instemem driver. > > Signed-off-by: Vince Hsu <vinceh at nvidia.com> > --- > drm/Kbuild | 1 + > nvkm/engine/device/nve...
2015 Jan 05
4
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...remove_clamping() is not sufficient for the enable > >>function. So add a new function which is dedicated to the GPU rail > >>gating. Also don't refer to the powergate ID since the GPU ID makes no > >>sense here. > >> > >>Signed-off-by: Vince Hsu <vinceh at nvidia.com> > >To be honest I don't see the point of this patch. > >You are bloating the PMC interface by introducing another exported > >function that does nothing different than what the current function > >already does. > > > >If you need a way to as...
2014 Dec 01
1
[RESEND PATCH nouveau 3/3] volt: add support for GK20A
On 28/11/2014 12:13, Vince Hsu wrote: > The voltage value are calculated by the hardware characterized > result. > > Signed-off-by: Vince Hsu <vinceh at nvidia.com> > --- > > Resend this patch with the fuse change and proper patch prefix > per Thierry's request. Since the voltage table really is per-chipset, it would be insane to add that to the DT. If it was not the case, it is still easier to move to the DT instead of doing...
2015 Jan 04
0
[PATCH V2 2/4] pwr: make nouveau_pwr_pgob() non-static
On Tue, Dec 23, 2014 at 11:37 AM, Vince Hsu <vinceh at nvidia.com> wrote: > > On 12/22/2014 05:11 PM, Vince Hsu wrote: >> >> The platform device does not use the common nouveau_pwr_init() to >> initialize >> the PWR, but it does need the .prob() be assigned to avoid NULL pointer >> dereference in graph/nve4.c....
2014 Dec 24
3
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...original function > tegra_powergate_remove_clamping() is not sufficient for the enable > function. So add a new function which is dedicated to the GPU rail > gating. Also don't refer to the powergate ID since the GPU ID makes no > sense here. > > Signed-off-by: Vince Hsu <vinceh at nvidia.com> To be honest I don't see the point of this patch. You are bloating the PMC interface by introducing another exported function that does nothing different than what the current function already does. If you need a way to assert the clamp I would have expected you to introduce...
2014 Dec 02
3
[V3 PATCH 1/4] soc/tegra: fuse: export tegra_sku_info
Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> Acked-by: Alexandre Courbot <acourbot at nvidia.com> Acked-by: Thierry Reding <treding at nvidia.com> --- v3: fix subject and typo, add reviewers' Acked-by v2: add more description why we need this patch drivers/soc/tegra/fuse/fuse-tegra.c | 1 + 1 file changed...
2013 May 31
4
AD user add to local windows group?
Pardon my noobness to this, but is anyone able to get around this issue<https://projects.puppetlabs.com/issues/15326> ? group {''testgroup'': ensure => present, members => ''DOMAIN\user'', name => ''test'' } Yields OLE error code:8007056B in Active Directory A member could not be added to or removed from the local group
2014 Dec 24
2
[PATCH nouveau 06/11] platform: complete the power up/down sequence
Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu: > This patch adds some missing pieces of the rail gaing/ungating sequence that > can improve the stability in theory. > > Signed-off-by: Vince Hsu <vinceh at nvidia.com> > --- > drm/nouveau_platform.c | 42 ++++++++++++++++++++++++++++++++++++++++++ > drm/nouveau_platform.h | 3 +++ > 2 files changed, 45 insertions(+) > > diff --git a/drm/nouveau_platform.c b/drm/nouveau_platform.c > index 68788b17a45c..527fe2358fc9 100644...