Displaying 3 results from an estimated 3 matches for "videocore".
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2014 May 28
2
[LLVMdev] Partially complete LLVM backend for the VideoCore 4
Hello,
For a while I've been working on an LLVM backend for Broadcom's
VideoCore 4, the GPU made famous by the Raspberry Pi. This isn't the
QPU, for which Broadcom released docs a little while ago; it's the main
processor, which is a VC4 core.
It's a rather elegant thing with two cores, 32 registers, a built-in DSP
and an extremely nice instruction set; reverse eng...
2014 May 29
2
[LLVMdev] Partially complete LLVM backend for the VideoCore 4
On 5/29/14, 12:12 PM, Alex Bradbury wrote:
[...]
> Congratulations on the release David, this looks very interesting. I
> had wondering what you were targeting given your series of questions
> to the mailing list :)
Yeah, it is a kind of distinctive architecture. Did I mention the
condition codes? It's got condition codes...
It's a lovely thing to write hand assembly in, by the
2014 Jul 05
6
[LLVMdev] Instructions on a target with no general purpose registers
I've mentioned my sneaky plans to target the MOS6502 here before.
The big issue I think is that a lot of instructions don't really have a choice for output register. It all just goes into the accumulator, X index, or Y index based on the specific instruction.
So, my question is, when I'm defining my ins, outs and registers for these instructions, is it going to be a problem that