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Hi, Just to clarify I am looking for a whole machine function analysis not just something restricted to within a machine basic block. Thanks. Regards, Venu. From: Raghavan, Venugopal Sent: Saturday, September 02, 2017 12:56 PM To: llvm-dev at lists.llvm.org Subject: Reaching definitions on Machine IR post register allocation Hi, Given a definition of a register by a machine instruction in the Machine IR post register allocation, I would like to compute the set of uses of th...

...and not even execute the SolveRecurse() function? This would avoid some compile time overhead, wouldn’t? SolveRecurse() does not need to be called if an LSR use has an empty formulae set associated with it because even if you called it you would not get a solution from it, right? Thanks. Regards, Venugopal Raghavan From: qcolombet at apple.com [mailto:qcolombet at apple.com] Sent: Friday, July 07, 2017 2:16 AM To: Raghavan, Venugopal <Venugopal.Raghavan at amd.com> Cc: llvm-dev at lists.llvm.org; Madhur Amilkanthwar <madhur13490 at gmail.com> Subject: Re: [llvm-dev] LLVM's loop str...

...017, at 11:16 PM, Madhur Amilkanthwar via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > AFAIK, no official doc. > You can probably get better help if you ask specific questions (which part of the code you don't understand). > > On Thu, Jul 6, 2017 at 9:53 AM, Raghavan, Venugopal via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: > Hi, > > > > My name is Venugopal Raghavan and I work in AMD. I was trying to understand the code in the file LoopStrengthReduce.cpp but I am making very slow progress. > >...

...in one of my test cases possibly due to the fact that my change is incorrect or incomplete. Apart from adding extra register units, do you need to do anything else? If you have the changes you made, I would be grateful if you can share it. Thanks. Regards, Venu. On Tue, Nov 14, 2017 at 8:54 AM, Venugopal Raghavan <venur2005 at gmail.com> wrote: > Hi Krzysztof, > > Thanks for the reply. > > Since a data flow edge is missing, I thought that it could be a > correctness issue and not just a precision issue. But, on second thoughts, > maybe it isn't because the edge fro...

...F2BOLT: spawning perf job to read process events PERF2BOLT: spawning perf job to read task events BOLT-INFO: Target architecture: x86_64 *BOLT-ERROR: input file was processed by BOLT. Cannot re-optimize.* Not sure why I get the above error. Can someone who has used BOLT help me? Thanks. Regards, Venugopal Raghavan. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20200408/248ba556/attachment.html>

Hi Venu, > On Sep 11, 2017, at 11:00 PM, Raghavan, Venugopal via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi Krzysztof, > > Thanks for your reply. > > I agree that adding extra register units for x86 would be the right way to fix this. Do you know if there is a plan to fix this? No concrete plan, no. We've been think...

...g further work on this because of the X86 partial definition issue mentioned above to which Krzysztof drew my attention. Regards, Venu. -----Original Message----- From: Geoff Berry [mailto:gberry at codeaurora.org] Sent: Tuesday, October 31, 2017 8:33 PM To: llvm-dev at lists.llvm.org; Raghavan, Venugopal <Venugopal.Raghavan at amd.com> Subject: Re: [llvm-dev] Reaching definitions on Machine IR post register allocation Hi Venu, FWIW, I have a pass that does copy propagation after RA [1] (currently only within a basic block) that should be enabled some time in the not-too-distant future. I...

...treatment of these to avoid the dependency issues, but the presence of these will reduce the precision of RDF. You can try to revert r300369 and see if it helps. It won't hurt Hexagon, so if helps X86, we could consider bringing that code back. -Krzysztof On 11/10/2017 6:52 AM, Raghavan, Venugopal via llvm-dev wrote: > Hi, > > For a test case that I ran I am seeing something in the RDF graph that I > do not quite understand. I think there is an data flow edge that is > missing but most likely I am wrong. > > The relevant portion of IR looks like this: > > BB...

...e still present, which is what my current patch does, and is the source of complexity that I'm trying to eliminate). [1] https://reviews.llvm.org/D30751 [2] https://reviews.llvm.org/D39400 D39400 WIP: [MachineOperand][MIR] Add isRenamable to MachineOperand. On 10/31/2017 5:49 AM, Raghavan, Venugopal via llvm-dev wrote: > Hi Krzysztof, > > Thanks a lot for taking the time to write a detailed explanation. I > think I understand things better now. > > I am trying to see if I can use RDF for X86 assuming I can add more > register units for X86 so that the partial re-defi...

Hi, I installed XEN 3.4-testing version without much problems in CentOS 5.3 running on quadcore Intel Nahelam processors using the following installation steps (as in the README) : <steps> hg clone http://xenbits.xensource.com/xen-3.4-testing.hg` cd xen-unstable.hg make world make install make linux-2.6-xen-config CONFIGMODE=menuconfig make linux-2.6-xen-build make linux-2.6-xen-install

Hi, My name is Venugopal Raghavan and I work in AMD. I was trying to understand the code in the file LoopStrengthReduce.cpp but I am making very slow progress. Is there any additional documentation available that would help me understand the code, like a PPT presentation or a design document or maybe a paper? I did not...

Hello, I have previously open a topic on the mailing list about deadlocking on Asterisk 1.2.35. After upgrading to 1.4.29.1 we still experienced the same problem : Mar 5 12:05:56] DEBUG[8647] channel.c: Avoiding initial deadlock for channel '0xb7689840' [Mar 5 12:06:41] DEBUG[7130] channel.c: Avoiding deadlock for channel '0xb7c04788' [Mar 5 12:06:41] DEBUG[7130]

We are having an issue with Asterisk 1.6.1 and the MWI turning on when a user doesn't have voicemail. We see random MWI lights come on and the phone indicates a random number of messages (its been anywhere from 1-14) when a server reload is done. I just checked one user, they have no messages old or new and the phone (Polycom IP330) indicates that they have 2 messages. The user will check for

Is there any easy way to identify which script or service is connecting to the Asterisk manager? Somewhere on my system a script or service is trying to connect with a bad user name or password. I get the following error: connect attempt from '127.0.0.1' unable to authenticate I thought maybe I could do a tcpdump on port 5038 and try to fish out the bad username or password but I

...ef/use). With respect to that model, memorySSA is right. The value of A could depend > on the abstract heap state of the definition of array "e". > > I'm on my phone, so this may not make much sense, but I hope this helps, > Siddharth. > > On Tue 19 Dec, 2017, 15:13 Venugopal Raghavan via llvm-dev, < > llvm-dev at lists.llvm.org> wrote: > >> Hi, >> >> I am new to MemorySSA and wanted to understand its capabilities. Hence I >> wrote the following program (test.c): >> >> int N; >> >> void test(int *restrict a,...

...(ON),2010-07-13 11:58:26 Micheal, I need your opensolaris user id. Core contributors, please take a look. --------------------------------------------------------------------- New suggestions (they have my vote) mph,Michael Hunter kcpoon,Kacheong Poon jbeck,John Beck amaguire,Alan Maguire iyer,Venugopal Iyer ??, Eric Cheng speer,Michael Speer roamer,Yunsong Lu gdamore,Garrett D''Amore artem,Artem Kachitchkine rishi,Rishi Srivatsavai zhijun,Zhijun Fu All these guys directly contribute code etc to opensolaris in networking area. For this section, if you agree with each of the proposed mem...

...mis-understanding the capabilities of MemorySSA? If not, can someone explain why the information is imprecise? Maybe the underlying alias analysis is unable to disambiguate the different arrays? But I would have thought that this would not be a difficult case for alias analysis. Thanks. Regards, Venugopal Raghavan. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20171219/50aae653/attachment.html>

Following is a short description on assigning priorities to a link (via dladm). Flows will have a similar mechanism (via flowadm). thanks, -venu ---------------------------------------------------------------------------- The components associated with a link or flow, such as Soft Ring Sets, Soft Rings and squeues, have kernel threads processing inbound/outbound packets. The scheduler

I decided to take a stab at 6601421 dladm set-linkprop should support multiple -p options along with some related linkprop fixes, but when I looked into dladm.c, was surprised to find that "dladm_parse_props()" is called from do_create_aggr and do_create_vlan in addition to the expected (by me, at least) do_create_vnic *linkprop functions. What happened here? Why do we pass in

hi I am trying to port the flac decoder library to uClinux which runs on blackfin processor I saw a directory contains ASM files inside src/libFLAC/ia32. I need to know, whether these files are to be converted to corresponding blackfin ASM routines in order for the decoder to work. regrads sivaraman __________________________________ Do you Yahoo!? Yahoo! Mail - You care about