search for: vdd_gpu

...t; index e31fb61a81d3..15a194d1277f 100644 > --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts > +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts > @@ -30,6 +30,12 @@ > }; > }; > > + gpu at 0,57000000 { > + status = "okay"; > + > + vdd-supply = <&vdd_gpu>; > + }; > + > pinmux: pinmux at 0,70000868 { > pinctrl-names = "default"; > pinctrl-0 = <&state_default>; > @@ -1505,7 +1511,7 @@ > regulator-always-on; > }; > > - sd6 { > + vdd_gpu: sd6 { > regulator-name...

This patch series is the final (?) step towards the initial support of GK20A, allowing it to be probed and used (currently at a very slow speed, and for offscreen rendering only) on the Jetson TK1 and Venice 2 boards. The main piece if the first patch which adds platform devices probing support to Nouveau. There are probably lots of things that need to be discussed about it, e.g.: * The way the

...presence of a BIOS, and will require a rework >> similar to that done in patch 2 for clocks. I would like to make sure this >> approach is approved because applying it to other subdevs. > > I think this should use CCF so we can use pre and post rate change notifiers > to hookup vdd_gpu DVS. Do you mean that we should turn the Nouveau gk20a clock driver into a consumer of this CCF clock? I have nothing against this, but note that Nouveau can also perform DVS on its own, as the pstates can also contain a voltage to be applied to the volt device (not yet implemented in this ser...

...44 >> --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts >> +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts >> @@ -30,6 +30,12 @@ >> }; >> }; >> >> + gpu at 0,57000000 { >> + status = "okay"; >> + >> + vdd-supply = <&vdd_gpu>; >> + }; >> + >> pinmux: pinmux at 0,70000868 { >> pinctrl-names = "default"; >> pinctrl-0 = <&state_default>; >> @@ -1505,7 +1511,7 @@ >> regulator-always-on; >> }; >> >> - sd6 { >>...

...-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts index e31fb61a81d3..15a194d1277f 100644 --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts @@ -30,6 +30,12 @@ }; }; + gpu at 0,57000000 { + status = "okay"; + + vdd-supply = <&vdd_gpu>; + }; + pinmux: pinmux at 0,70000868 { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -1505,7 +1511,7 @@ regulator-always-on; }; - sd6 { + vdd_gpu: sd6 { regulator-name = "+VDD_GPU_AP"; regulator-min-microvolt = &...

...0a"; + reg = <0x0 0x57000000 0x0 0x01000000>, + <0x0 0x58000000 0x0 0x01000000>; + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "stall", "nonstall"; + vdd-supply = <&vdd_gpu>; + clocks = <&tegra_car TEGRA124_CLK_GPU>, + <&tegra_car TEGRA124_CLK_PLL_P_OUT5>; + clock-names = "gpu", "pll"; + resets = <&tegra_car 184>; + reset-names = "gpu"; + status = "disabled"; + }; + +}; -- 1.9.2

...depend heavily on the presence of a BIOS, and will require a rework > similar to that done in patch 2 for clocks. I would like to make sure this > approach is approved because applying it to other subdevs. I think this should use CCF so we can use pre and post rate change notifiers to hookup vdd_gpu DVS. Thanks, Peter.

...ill require a rework > >> similar to that done in patch 2 for clocks. I would like to make sure this > >> approach is approved because applying it to other subdevs. > > > > I think this should use CCF so we can use pre and post rate change notifiers > > to hookup vdd_gpu DVS. > > Do you mean that we should turn the Nouveau gk20a clock driver into a > consumer of this CCF clock? I have nothing against this, but note that > Nouveau can also perform DVS on its own, as the pstates can also contain > a voltage to be applied to the volt device (not yet...

...gt;> similar to that done in patch 2 for clocks. I would like to make sure >>> this >>> approach is approved because applying it to other subdevs. >> >> >> I think this should use CCF so we can use pre and post rate change >> notifiers >> to hookup vdd_gpu DVS. > > > Do you mean that we should turn the Nouveau gk20a clock driver into a > consumer of this CCF clock? I have nothing against this, but note that > Nouveau can also perform DVS on its own, as the pstates can also contain a > voltage to be applied to the volt device (not ye...

This series adds support for probing platform devices on Nouveau, as well as the DT bindings for GK20A. It doesn't enable the GPU yet on Tegra boards since a few extra things need to be supported before that. Thanks to the input received for v1, this version is more self-contained and shares less stuff between nouveau_drm and nouveau_platform. The major change is that nouveau_platform is now

This series adds support for reclocking on GK20A. The first two patches touch the clock subsystem to allow GK20A to operate, by making the presence of the thermal and voltage devices optional, and allowing pstates to be provided directly instead of being probed using the BIOS (which Tegra does not have). The last patch adds the GK20A clock device. Arguably the clock can be seen as a stripped-down

This series adds support for probing platform devices on Nouveau, as well as the DT bindings for GK20A. It doesn't enable the GPU yet on Tegra boards since a few extra things need to be supported before that. This version is mostly identical to v2 but fixes an important issue: the drvdata must be set to the drm_device for sysfs to work, so the platform device structure now includes the