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f128mem
2012 Jul 09
2
[LLVMdev] question on table gen TIED_TO constraint
I need to implement an instruction which has 2 read-write registers, so I added
let Constraints = "$src1 = $dst, $mask = $mask_wb" in {
...
def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst, VR128:$mask_wb),
(ins VR128:$src1, v128mem:$src2, VR128:$mask),
...
}
There is a problem since MRMSrcMem assumes the 2nd physical operand is a memory operand.
See the section about MRMSrcMem in RecognizableInstr::emitInstructionSpecifier.
And the above gives us $dst, $mask_wb, $src1, $mem, $mask, and $mask_wb is the second physical operand....
2012 Jul 10
0
[LLVMdev] question on table gen TIED_TO constraint
...e.com> wrote:
>
> I need to implement an instruction which has 2 read-write registers, so I added
> let Constraints = "$src1 = $dst, $mask = $mask_wb" in {
> ...
> def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst, VR128:$mask_wb),
> (ins VR128:$src1, v128mem:$src2, VR128:$mask),
> ...
> }
> There is a problem since MRMSrcMem assumes the 2nd physical operand is a memory operand.
> See the section about MRMSrcMem in RecognizableInstr::emitInstructionSpecifier.
Can this be fixed?
Evan
> And the above gives us $dst, $mask_wb, $src1, $mem,...
2012 Jul 10
2
[LLVMdev] question on table gen TIED_TO constraint
...>
>> I need to implement an instruction which has 2 read-write registers, so I added
>> let Constraints = "$src1 = $dst, $mask = $mask_wb" in {
>> ...
>> def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst, VR128:$mask_wb),
>> (ins VR128:$src1, v128mem:$src2, VR128:$mask),
>> ...
>> }
>> There is a problem since MRMSrcMem assumes the 2nd physical operand is a memory operand.
>> See the section about MRMSrcMem in RecognizableInstr::emitInstructionSpecifier.
>
> Can this be fixed?
>
> Evan
>
>> And th...
2012 Jul 10
0
[LLVMdev] question on table gen TIED_TO constraint
...implement an instruction which has 2 read-write registers, so
> I added
> >> let Constraints = "$src1 = $dst, $mask = $mask_wb" in {
> >> ...
> >> def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst, VR128:$mask_wb),
> >> (ins VR128:$src1, v128mem:$src2, VR128:$mask),
> >> ...
> >> }
> >> There is a problem since MRMSrcMem assumes the 2nd physical operand is
> a memory operand.
> >> See the section about MRMSrcMem in
> RecognizableInstr::emitInstructionSpecifier.
> >
> > Can this be fixed...