Displaying 5 results from an estimated 5 matches for "upcfrost".
2017 Jun 16
2
Wide load/store optimization question
...alignment), is there any difference between virt regclass and regtuple?
Best regards,Petr
Отправлено со смартфона Samsung Galaxy.
-------- Исходное сообщение --------От: 陳韋任 <chenwj.cs97g at g2.nctu.edu.tw> Дата: 16.06.17 22:03 (GMT+02:00) Кому: tstellar at redhat.com Копия: Peter Bel <upcfrost at gmail.com>, LLVM Developers Mailing List <llvm-dev at lists.llvm.org> Тема: Re: [llvm-dev] Wide load/store optimization question
One thing you can do is define a register class that is made up of register
tuples e.g. r0r1, r2r3, etc., and use that register class for the 64-bit
load/s...
2017 Jun 17
2
Wide load/store optimization question
> On Jun 16, 2017, at 2:43 PM, 陳韋任 via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
>
>
> 2017-06-17 4:36 GMT+08:00 upcfrost <upcfrost at gmail.com <mailto:upcfrost at gmail.com>>:
> Hi,
>
> Same here, my backend only has 64bit load/store. But i still use 64bit virt regs and expand/declare missing instructions by myself.
>
> I'll try looking into sparc backend, thanks. Also, only after w...
2017 Jan 25
2
Got stuck with PC-rel branching
Big thanks, i've managed to find what's going on. The thing that dumbfolded
me a couple of times was that the error was thrown in one of the
MCAssembler methods, but never in applyFixup() itself.
On Thu, Jan 19, 2017 at 8:46 PM, Friedman, Eli <efriedma at codeaurora.org>
wrote:
> On 1/19/2017 10:21 AM, Peter Bel wrote:
>
>> Hi,
>>
>> For the function call -
2017 Mar 22
3
REG_SEQUENCE use question
Hi all,
Can someone please explain me how to use REG_SEQUENCE in tablegen?
The arch i'm writing backend for has 32-bit regs, and it has a couple of
64-bit load/store instructions which use two neighboring regs at once,
which i'm trying to employ using virtual regs with subs.
For example, it I want to move one 64-bit virtual reg to another, I'm
trying to use the following pattern:
2017 Jan 19
3
Got stuck with PC-rel branching
...MCExpr, it creates fixup, and I can see this fixup in debug.
- Fixup is called fixup_Epiphany_PCREL24, and is defined in
EpiphanyFixupKinds and EpiphanyAsmBackend, with FKF_IsPCRel flag.
Can someone please tell me if I am missing something?
The source itself can be found at
https://github.com/upcFrost/Epiphany/tree/Call_support
Debug output on pastebin: http://pastebin.com/8uKRv0qK
Thanks,
Petr
P.S. sorry for messy code, I knew nothing about LLVM backends when I
started, so the code have copy-paste in more than one place.
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