Displaying 6 results from an estimated 6 matches for "unk20".
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unk0
2013 Jul 18
1
[PATCH 02/11] drm/nv50/pm: Fix last timing register in NVA3+, fix typo in NV50
...44
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -73,7 +73,8 @@ nv50_mem_timing_calc(struct drm_device *dev, u32 freq,
struct nouveau_fb *pfb = nouveau_fb(device);
struct nouveau_drm *drm = nouveau_drm(dev);
struct bit_entry P;
- uint8_t unk18 = 1, unk20 = 0, unk21 = 0, tmp7_3;
+ uint8_t unk18 = 1, unk20 = 0, unk21 = 0, tUnk_3_2;
+ int tUNK_base;
if (bit_table(dev, 'P', &P))
return -EINVAL;
@@ -91,6 +92,11 @@ nv50_mem_timing_calc(struct drm_device *dev, u32 freq,
break;
}
+ tUnk_3_2 = (boot->reg[3] & 0x00ff0000) >...
2013 Jul 18
0
[PATCH 02/11] drm/nv50/pm: Fix last timing register in NVA3+, fix typo in NV50
...nouveau_mem.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
> @@ -73,7 +73,8 @@ nv50_mem_timing_calc(struct drm_device *dev, u32 freq,
> struct nouveau_fb *pfb = nouveau_fb(device);
> struct nouveau_drm *drm = nouveau_drm(dev);
> struct bit_entry P;
> - uint8_t unk18 = 1, unk20 = 0, unk21 = 0, tmp7_3;
> + uint8_t unk18 = 1, unk20 = 0, unk21 = 0, tUnk_3_2;
> + int tUNK_base;
>
> if (bit_table(dev, 'P', &P))
> return -EINVAL;
> @@ -91,6 +92,11 @@ nv50_mem_timing_calc(struct drm_device *dev, u32 freq,
> break;
> }
>...
2012 Jun 25
1
[PATCH 1/2] drm/nouveau/pm: Prepare for more GDDR5 MR values
v2: style fixes
Signed-off-by: Roy Spliet <r.spliet at student.tudelft.nl>
---
drivers/gpu/drm/nouveau/nouveau_drv.h | 2 +-
drivers/gpu/drm/nouveau/nouveau_mem.c | 25 +++++++++++++++++++------
2 files changed, 20 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index b8fa77d..fe242a3 100644
---
2011 Oct 09
1
(no subject)
Hi,
This is my work in documenting EVO.
I did some RE to fill missing gaps.
Best regards,
Maxim Levitsky
2013 Aug 11
10
[PATCH 00/10] Add support for MPEG2 and VC-1 on VP3/VP4 for NV98-NVAF
As it turns out, with the proprietary firmware, the VP3 and VP4 interfaces are
identical. Furthermore, this is all already implemented for nvc0. So these
patches (a) move the easily sharable bits of the nvc0 implementation into the
nouveau directory, and then (b) implement the other parts in nv50. The
non-shared parts are still largely copies, but there are some differences, not
the least of which
2010 Feb 25
3
[PATCH 1/3] drm/nv50: Implement ctxprog/state generation.
...1
+#define CP_FLAG_UNK0B ((0 * 32) + 0xb)
+#define CP_FLAG_UNK0B_CLEAR 0
+#define CP_FLAG_UNK0B_SET 1
+#define CP_FLAG_UNK1D ((0 * 32) + 0x1d)
+#define CP_FLAG_UNK1D_CLEAR 0
+#define CP_FLAG_UNK1D_SET 1
+#define CP_FLAG_UNK20 ((1 * 32) + 0)
+#define CP_FLAG_UNK20_CLEAR 0
+#define CP_FLAG_UNK20_SET 1
+#define CP_FLAG_STATUS ((2 * 32) + 0)
+#define CP_FLAG_STATUS_BUSY 0
+#define CP_FLAG_STATUS_IDLE 1
+#define CP_FLAG_AUTO_SAVE ((2 * 32) +...