search for: unk0

...map.h index ae2f27b..8fa1294 100644 --- a/drm/nouveau/include/nvkm/subdev/bios/vmap.h +++ b/drm/nouveau/include/nvkm/subdev/bios/vmap.h @@ -11,7 +11,7 @@ u16 nvbios_vmap_parse(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_vmap *); struct nvbios_vmap_entry { - u8 unk0; + u8 mode; u8 link; u32 min; u32 max; diff --git a/drm/nouveau/nvkm/subdev/bios/vmap.c b/drm/nouveau/nvkm/subdev/bios/vmap.c index f2295e1..32bd8b1 100644 --- a/drm/nouveau/nvkm/subdev/bios/vmap.c +++ b/drm/nouveau/nvkm/subdev/bios/vmap.c @@ -105,7 +105,7 @@ nvbios_vmap_entry_parse(struct...

...b does ton of extra stuff before finishing the supervisor task--- [0] 443.963375 MMIO32 R 0x61c804 0x10000001 PDISPLAY.SOR[0x1].PWR => { NORMAL_STATE = PU | NORMAL_START = NORMAL | SAFE_STATE = PD | SAFE_START = NORMAL | MODE } [0] 443.963394 MMIO32 R 0x00e840 0x80080000 PNVIO.RPLL2.CTRL => { UNK0 = 0 | UNK19 = 0x1 | UNK31 } [0] 443.963413 MMIO32 W 0x00e840 0x80080000 PNVIO.RPLL2.CTRL <= { UNK0 = 0 | UNK19 = 0x1 | UNK31 } [0] 443.963430 MMIO32 R 0x614b00 0x00074080 PDISPLAY.CLOCK.SOR[0x1] => 0x74080 [0] 443.963445 MMIO32 W 0x614b00 0x03074080 PDISPLAY.CLOCK.SOR[0x1] <= 0x3074080 [0]...

...= nv_ro32(bios, vmap + 0x08); + b = nv_ro32(bios, vmap + 0x0c); + c = nv_ro32(bios, vmap + 0x10); + + accum += b * 1505; + accum += (c * 453 / 2) + c / 400; + accum /= 10; + + if (accum > info->min) + info->min = min((u32)accum, info->max); break; + } case 0x20: info->unk0 = nv_ro08(bios, vmap + 0x00); info->link = nv_ro08(bios, vmap + 0x01); diff --git a/drivers/gpu/drm/nouveau/core/subdev/volt/base.c b/drivers/gpu/drm/nouveau/core/subdev/volt/base.c index 32794a999106..7bf716b048bd 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/volt/base.c +++ b/drivers...

...ool in the last patch, which can be ran alongside the nvidia driver to test nouveaus volting code and print the actual voltage differences nouveau would try to set and what nvidia actually set on the gpu. Karol Herbst (9): bios/volt: handle voltage table version 0x50 with 0ed header bios/vmap: unk0 field is the mode clk: add index field to nvkm_cstate bios: add parsing of BASE CLOCK table clk: print the base clocks volt: save the voltage range we are able to set volt: parse the both max voltage entries clk: export nvkm_volt_map add daemon to compare nouveau with blob voltage b...

...c 0 mthd 0x00\ 00 data 0x00000000 [ 2092.200494] nouveau E[ PFIFO][0000:08:00.0] PBDMA1: SIGNATURE [ 2092.200496] nouveau E[ PFIFO][0000:08:00.0] PBDMA1: ch 13 [vlc[4136]] subc 0 mthd 0x00\ 00 data 0x00000000 [ 2092.200511] nouveau E[ PFIFO][0000:08:00.0] read fault at 0x0000000000 [PDE] from UNK0\ a/HOST on channel 0x007ecf9000 [unknown] [ 2092.200706] nouveau 0000:08:00.0: Direct firmware load for nouveau/nve4_fuc084 failed wi\ th error -2 [ 2092.200716] nouveau 0000:08:00.0: Direct firmware load for nouveau/nve4_fuc084d failed w\ ith error -2 [ 2092.200718] nouveau E[ PMSVLD][0000:08:00....

Hello, This series exposes global performance counters (PCOUNTER) to the userspace through the nvif interface by reworking most of the code related to the PM engine. This interface will allow the userspace to control and monitor complex hardware events like the proprietary driver already does, for example with CUPTI and PerfKit. For now, this series only exposes performance counters on NV50,

...k_tstate take a temperature value volt: Add temperature parameter to nvkm_volt_map clk: Fixup cstate selection clk: Respect voltage limits in nvkm_cstate_prog bios: Add parsing of VPSTATE table clk: Allow boosting only when NvBoost is set volt: Don't require perfect fit bios/vmap: unk0 field is the mode volt: Add implementation for gf100 volt/gf100-: Add speedo volt: Make use of cvb coefficients fb/ram: Use Kepler implementation on Maxwell drm/nouveau/include/nvkm/subdev/bios/vmap.h | 5 +- drm/nouveau/include/nvkm/subdev/bios/volt.h | 5 +- drm/nouveau/includ...

...clk: add index field to nvkm_cstate add daemon to compare nouveau with blob voltage volt: add temperature parameter to nvkm_volt_map nouveau/subdev/clk: fixup cstate selection clk: respect voltage limits in nvkm_cstate_prog with cstate = -1 volt: don't require perfect fit bios/vmap: unk0 field is the mode volt: add coefficients I found on my gpu bin/nv_cmp_volt.c | 130 +++++++++++++++++++++ drm/nouveau/include/nvkm/subdev/bios/baseclock.h | 24 ++++ drm/nouveau/include/nvkm/subdev/bios/vmap.h | 4 +- drm/nouveau/include/nvkm/subdev/bios/v...

...blob voltage volt: add temperature parameter to nvkm_volt_map clk: fixup cstate selection clk: respect voltage limits in nvkm_cstate_prog with cstate = -1 bios: add parsing of BASE CLOCK table clk: allow boosting only when NvBoost is set volt: don't require perfect fit bios/vmap: unk0 field is the mode volt: add coefficients I found on my gpu clk: save the max clock we can set clk: add nvkm_clk_reclock function nvif: add boost info and set operations debugfs: add boost interface to change the boost_mode bin/nv_cmp_volt.c | 130 +++++++++...

...pare nouveau with blob voltage volt: add temperature parameter to nvkm_volt_map clk: fixup cstate selection clk: respect voltage limits in nvkm_cstate_prog bios: add parsing of BASE CLOCK table clk: allow boosting only when NvBoost is set volt: don't require perfect fit bios/vmap: unk0 field is the mode volt: add coefficients I found on my gpu clk: save the max clock we can set clk: rename nvkm_pstate_calc to nvkm_clk_update nvif: add boost info and set operations debugfs: add boost interface to change the boost_mode clk: remove dstate and tstate therm: don't ca...

...pare nouveau with blob voltage volt: add temperature parameter to nvkm_volt_map clk: fixup cstate selection clk: respect voltage limits in nvkm_cstate_prog bios: add parsing of BASE CLOCK table clk: allow boosting only when NvBoost is set volt: don't require perfect fit bios/vmap: unk0 field is the mode volt: add speedo volt: add gf100 subdev with speedo volt: add coefficients clk: save the max clock we can set clk: rename nvkm_pstate_calc to nvkm_clk_update nvif: add boost info and set operations debugfs: add boost interface to change the boost_mode clk: remove d...

This patchset applies some minor fixes to renouveau.xml and then unifies the nv30 and nv40 register definitions. nv30 and nv40 are very similar and have the same offsets for the registers they share. The major differences are: 1. Texture setup is different due to full NPOT support on nv40 2. More advanced blending/render targets on nv40 3. NV30 has fixed function registers, which NV40 lacks The