Displaying 3 results from an estimated 3 matches for "udiv_and".
2009 Jan 06
1
[LLVMdev] Look-ahead instruction selection
...on very well.
I want to match these patterns:
(and (mul node:$val0, node:$val1))
(and (add node:$val0, node:$val1))
(and (sub node:$val0, node:$val1))
(and (udiv node:$val0, node:$val1))
into "four" different machines instructions, respectively:
MUL_AND
ADD_AND
SUB_AND
UDIV_AND
That is, this machine is capable of doing an arithmetic operation and a
"following" AND operation by a single machine instruction. There are a lot
of arithmetic operations but they can only be combined with a following AND
operation. It's important that only the following AND can be...
2009 Jan 05
0
[LLVMdev] Look-ahead instruction selection
On Mon, Jan 5, 2009 at 2:32 PM, Alex <alex.lavoro.propio at gmail.com> wrote:
> In .td file, if the pattern to match the DAG is:
>
> (vector_shuffle (mul build_vector, build_vector))
>
> is it possible to return 'mul' (SDNode*) instead of returning the first
> 'vector_shuffle'?
>
> It seems to me that the default instruction selector can only return
2009 Jan 05
2
[LLVMdev] Look-ahead instruction selection
In .td file, if the pattern to match the DAG is:
(vector_shuffle (mul build_vector, build_vector))
is it possible to return 'mul' (SDNode*) instead of returning the first
'vector_shuffle'?
It seems to me that the default instruction selector can only return the
'root' node of the pattern.
Alex.
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