search for: tynod

Displaying 16 results from an estimated 16 matches for "tynod".

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2016 Mar 18
2
Immediate operand for load instruction, in back end
...ired from Mips' MSA SIMD extensions.) Could you please tell me what's the right way to do it? Here, the load class has $addrsrc which is a relative address with base a certain register and offset: class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, ValueType TyNode, RegisterOperand ROWD, Operand MemOpnd = mem_msa, ComplexPattern Addr = addrimm10, InstrItinClass itin = NoItinerary> { dag OutOperandList = (outs ROWD:$wd); dag InOperandList = (ins MemOpnd:$addrsrc); string AsmString = !strconcat("mov $wd, ($addrsrc)"); li...
2016 Oct 24
2
Instruction selection confusion at register - chooses vector register instead of scalar one
...ob/master/lib/Target/Mips/MipsMSAInstrInfo.td, look for "def ST_D", etc. Note however that my vector unit has a separate memory space. This is why I defined the vector store like: class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, ValueType TyNode, RegisterOperand ROWD, Operand MemOpnd = uimm4_ptr, ImmLeaf Addr = immLeafAlex, InstrItinClass itin = NoItinerary> { dag OutOperandList = (outs); dag InOperandList = (ins ROWD:$wd, MemOpnd:$addrdst); string AsmString = !strconcat(&quo...
2016 Oct 25
0
Instruction selection confusion at register - chooses vector register instead of scalar one
...blob/master/lib/Target/Mips/MipsMSAInstrInfo.td, look for "def ST_D", etc. Note however that my vector unit has a separate memory space. This is why I defined the vector store like: class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, ValueType TyNode, RegisterOperand ROWD, Operand MemOpnd = uimm4_ptr, ImmLeaf Addr = immLeafAlex, InstrItinClass itin = NoItinerary> { dag OutOperandList = (outs); dag InOperandList = (ins ROWD:$wd, MemOpnd:$addrdst); string AsmString = !strconcat(&quo...
2016 Mar 22
0
Immediate operand for load instruction, in back end
...s.) > Could you please tell me what's the right way to do it? > > > Here, the load class has $addrsrc which is a relative address with base a > certain > register and offset: > class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, > ValueType TyNode, RegisterOperand ROWD, > Operand MemOpnd = mem_msa, > ComplexPattern Addr = addrimm10, > InstrItinClass itin = NoItinerary> { > dag OutOperandList = (outs ROWD:$wd); > dag InOperandList = (ins MemOpnd:$addrsrc); > string AsmString = !strconcat("mov...
2018 Mar 14
3
lld/lto/win32 crash on DIE code
...nt LLD/LTO llvm crashing on DIE *ContextDIE = getOrCreateContextDIE(Context) being null for a (local) variable. (Context is a DICompileUnit in this case, but it's not present in MDNodeToDieMap so it returns null. callstack is: llc.exe!llvm::DwarfUnit::getOrCreateTypeDIE(const llvm::MDNode * TyNode) Line 718 C++ llvm::DwarfUnit::addType(llvm::DIE & Entity, const llvm::DIType * Ty, llvm::dwarf::Attribute Attribute) Line 768 C++ llvm::DwarfCompileUnit::applyVariableAttributes(const llvm::DbgVariable & Var, llvm::DIE & VariableDie) Line 897 C++ llvm::DwarfCompileUnit::finishVaria...
2016 Dec 11
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...def VK128: RegisterClass<"Connex", [v128i1], 32, (sequence "Mask%u", 0, 31)>; def VK128Opnd : RegisterOperand<VK128> { let ParserMatchClass = MSA128AsmOperand; } class LD_INDIRECT_DESC_BASE2<string instr_asm, ValueType TyNode, RegisterOperand ROWD, RegisterOperand ROWSI = ROWD, RegisterOperand ROWSP = ROWD, // passthru register InstrItinClass itin = NoItinerary> { dag OutOperandList = (outs ROWD:$wd); dag InOperandList...
2016 Dec 09
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hi Alex, I don’t know too much about recent MIPS, but have recently been doing something similar for the new ARM SVE architecture, so hopefully this will get you closer to what you need: If you’re looking where I think you are (lib/Target/X86/X86InstrAVX512.td), ‘GatherNode’ is a template argument, not a definition. It allows a PatFrag be passed into the avx512_gather multiclass definition.
2018 Mar 16
0
lld/lto/win32 crash on DIE code
...cent LLD/LTO llvm crashing on DIE *ContextDIE = getOrCreateContextDIE(Context) being null for a (local) variable. (Context is a DICompileUnit in this case, but it's not present in MDNodeToDieMap so it returns null. callstack is: llc.exe!llvm::DwarfUnit::getOrCreateTypeDIE(const llvm::MDNode * TyNode) Line 718 C++ llvm::DwarfUnit::addType(llvm::DIE & Entity, const llvm::DIType * Ty, llvm::dwarf::Attribute Attribute) Line 768 C++ llvm::DwarfCompileUnit::applyVariableAttributes(const llvm::DbgVariable & Var, llvm::DIE & VariableDie) Line 897 C++ llvm::DwarfCompileU...
2016 Dec 12
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...ss<"Connex", [v128i1], 32, (sequence "Mask%u", 0, 31)>; > def VK128Opnd : RegisterOperand<VK128> { > let ParserMatchClass = MSA128AsmOperand; > } > > class LD_INDIRECT_DESC_BASE2<string instr_asm, > ValueType TyNode, > RegisterOperand ROWD, > RegisterOperand ROWSI = ROWD, > RegisterOperand ROWSP = ROWD, // passthru register > InstrItinClass itin = NoItinerary> { > dag OutOperandList = (outs ROWD:$wd); >...
2018 Mar 20
2
lld/lto/win32 crash on DIE code
...e, const unsigned int line_number, void * const return_address) Line 415 C++ Symbols loaded. ucrtbased.dll!_wassert(const wchar_t * expression, const wchar_t * file_name, unsigned int line_number) Line 443 C++ Symbols loaded. lld.exe!llvm::DwarfUnit::getOrCreateTypeDIE(const llvm::MDNode * TyNode) Line 753 C++ Symbols loaded. lld.exe!llvm::DwarfUnit::addType(llvm::DIE & Entity, const llvm::DIType * Ty, llvm::dwarf::Attribute Attribute) Line 803 C++ Symbols loaded. lld.exe!llvm::DwarfCompileUnit::applyVariableAttributes(const llvm::DbgVariable & Var, llvm::DIE & Variabl...
2016 Dec 09
5
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hello. I read on page 4 of http://www.cs.fsu.edu/~whalley/cda5155/chap4.pdf that gather and scatter operations exist for Mips, named LVI and SVI, respectively. Did anyone think of implementing in the LLVM Mips back end (part of the MSA vector instructions) gather and scatter operations? If so, can you share with me the TableGen spec? (I tried to start from LD_DESC_BASE, but it
2016 Dec 15
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
..., [v128i1], 32, (sequence "Mask%u", 0, 31)>; >> def VK128Opnd : RegisterOperand<VK128> { >> let ParserMatchClass = MSA128AsmOperand; >> } >> >> class LD_INDIRECT_DESC_BASE2<string instr_asm, >> ValueType TyNode, >> RegisterOperand ROWD, >> RegisterOperand ROWSI = ROWD, >> RegisterOperand ROWSP = ROWD, // passthru register >> InstrItinClass itin = NoItinerary> { >> dag OutOperandList = (o...
2018 Mar 20
0
lld/lto/win32 crash on DIE code
This one triggers an assertion in calculateSEHStateNumbers due to weird catchpad instruction in @_island_debug_invoke and many other functions. The code expects either pointer to a filter function or null in first operand, while you're passing pointer to structure: catchpad within %80 [{i8*, i8*}* anon..., ...] ________________________________________ От: Carlo Kok <ck at
2018 Mar 21
0
lld/lto/win32 crash on DIE code
...line_number, void * const return_address) Line 415 C++ Symbols loaded. ucrtbased.dll!_wassert(const wchar_t * expression, const wchar_t * file_name, unsigned int line_number) Line 443 C++ Symbols loaded. lld.exe!llvm::DwarfUnit::getOrCreateTypeDIE(const llvm::MDNode * TyNode) Line 753 C++ Symbols loaded. lld.exe!llvm::DwarfUnit::addType(llvm::DIE & Entity, const llvm::DIType * Ty, llvm::dwarf::Attribute Attribute) Line 803 C++ Symbols loaded. lld.exe!llvm::DwarfCompileUnit::applyVariableAttributes(const llvm::DbgVariable & Var, llv...
2018 Mar 20
2
lld/lto/win32 crash on DIE code
Op 16-3-2018 om 20:16 schreef Evgeny Leviant: > Hello Carlo, > > I tried your reproducer and faced different problem from one you described > (I'm using MacOS Sierra and lld built from trunk on Mar, 15). The crash happens > when SelectionDAGBuilder::lowerInvokable tries to access EH info of this function: > >
2013 Sep 30
1
[LLVMdev] [patch] Prototype/proof-of-concept for DWARF type units
This isn't a realistic/viable implementation, just a hacked up "can I make it produce the right output" kind of thing, but while I hammer out a few more details (like fixing MC to allow multiple sections with the same name but different comdat groups) I figured I'd throw it out there to have a bit of a chat about it. I've tested simple cases of a single type and they seem to