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tutorial
2017 Dec 21
2
How to implement lowerReturn for poring GlobalISel to RISCV?
...t be
provided if supervisor mode is supported. URET is only provided if
user-mode traps are supported. and David added RISCV privileged
instructionsit[3], then merged into upstream, it might be more complex
than ARM[4] please give me some hint, thanks a lot!
[1] http://llvm.org/devmtg/2017-10/#tutorial2
[2]
https://github.com/riscv/riscv-isa-manual/blob/master/src/machine.tex#L539
[3] https://reviews.llvm.org/D40383
[4]
https://github.com/llvm-mirror/llvm/blob/master/lib/Target/ARM/ARMCallLowering.cpp#L280
--
Regards,
Leslie Zhai - https://reviews.llvm.org/p/xiangzhai/