search for: ttbcr

This patch fixes size of ttbcr register (TCR_EL1 in case of AArch64) and it''s programming considering size in case of context switch. Currently ttbcr is defined as 32b register but for AArch64 TCR_EL1 size is 64b. Signed-off-by: Anup Patel <anup.patel@linaro.org> Signed-off-by: Pranavkumar Sawargaonkar <prana...

This round implements all of the review comments from V2 and all patches are now acked. Unless there are any objections I intend to apply later this morning. Ian.

First off, Apologies for the massive patch series... This series boots a 32-bit dom0 kernel to a command prompt on an ARMv8 (AArch64) model. The kernel is the same one as I am currently using with the 32 bit hypervisor I haven''t yet tried starting a guest or anything super advanced like that ;-). Also there is not real support for 64-bit domains at all, although in one or two places I

...--git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index 1c9d793..263bd03 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -3,9 +3,6 @@ #include <asm/cpregs.h> -/* MIDR Main ID Register */ -#define MIDR_MASK 0xff0ffff0 - /* TTBCR Translation Table Base Control Register */ #define TTBCR_EAE 0x80000000 #define TTBCR_N_MASK 0x07 diff --git a/xen/include/asm-arm/procinfo.h b/xen/include/asm-arm/procinfo.h new file mode 100644 index 0000000..68900c4 --- /dev/null +++ b/xen/include/asm-arm/procinfo.h @@ -0,0 +1,30 @@ +/* + *...

I''ve addressed all (I think/hope) of the review comments. The main change is to expose the guest virtual platform (e.g. memory layout and interrupt usage etc) to the toolstack via the public interface. This is then used during FDT generation. I have just codified the current defacto standard layout, it''s probably not the best layout but any change can be a separate patch/series.

..., offsetof(struct vcpu_guest_context, contextidr)); + DEFINE(OFFSET_VCPU_FCSEIDR, offsetof(struct vcpu_guest_context, fcseidr)); + DEFINE(OFFSET_VCPU_TTBR0, offsetof(struct vcpu_guest_context, ttbr0)); + DEFINE(OFFSET_VCPU_TTBR1, offsetof(struct vcpu_guest_context, ttbr1)); + DEFINE(OFFSET_VCPU_TTBCR, offsetof(struct vcpu_guest_context, ttbcr)); + //DEFINE(OFFSET_HYPERVISOR_CALLBACK, offsetof(struct vcpu_guest_context, event_callback)); + //DEFINE(OFFSET_FAILSAFE_CALLBACK, offsetof(struct vcpu_guest_context, failsafe_callback)); BLANK(); return 0; diff -r 28a6038da99f xen/arch/arm/xen/e...

Hi, This is the fifth version of this patch series. With the Versatile Express TC2, it''s possible to boot only with A7 or A15. If the user choose to boot with only A7, the CPU ID will start at 0x100. As Xen relies on it to set the logical ID and the GIC, it won''t be possible to use Xen with this use case. This patch series is divided in 3 parts: - Patch 1: prepare Xen

Biggest change is to switch the new DTB node to /xen-core-devices instead of /xen at Stefano''s request. I also dropped the few patches title HACK etc which weren''t supposed to be there and fixed up some bits and pieces which folks commented on. George, WRT the freeze I think this is functionality which we cannot ship Xen 4.4 without. The impact is entirely constrained to the

Hello, This is the second version of this patch series. I only implement the VPF context switch support for arm32 and add dummy function to avoid compilation on arm64. I have switched the order of the patch because the old second one can be applied alone and the patch are cleaner :). For all the changes see each patch. Cheers, Julien Grall (2): xen/arm: don''t enable VFP on XEN

I''m afraid this series is rather a grab bag and it is distressingly large at this stage. With this series I can boot an Xgene board until it fails to find its SATA controller. This is a dom0 issue for which patches are pending from APM (/me nudges Anup). As well as the APM specific platform stuff there are also some generic improvements which were either necessary or useful during this

Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

Hello everyone, this is the very first version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

George has release acked all of these. Otherwise mostly minor updates this time around. Summary: A == acked, M == modified A xen: arm64: Add 8250 earlyprintk support A xen: arm64: Add Basic Platform support for APM X-Gene Storm. A xen: arm64: Add APM implementor id to processor implementers. M xen: arm: add a quirk to handle platforms with unusual GIC layout A xen: arm: allow platform

Hi all, this small patch series implement guest SMP support for ARM, using the ARM PSCI interface for secondary cpu bringup. Stefano Stabellini (4): xen/arm: basic PSCI support, implement cpu_on xen/arm: support for guest SGI xen/arm: support vcpu_op hypercalls xen: move VCPUOP_register_vcpu_info to common code xen/arch/arm/domain.c | 66 ++++++++++++++++++++++++