search for: tscs

Displaying 20 results from an estimated 59 matches for "tscs".

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2008 Dec 29
1
Guest time and TSCs since changeset 17716
Changeset 17716 provides monotonically increasing guest time for HVM domains, by using the per-domain pl_time structure. hvm_get_guest_time and hvm_set_guest_time were changed to use this. Previously, the guest time was stored directly in the TSC offset fields of the vmx/smv control structures. Since pt_freeze_time and pt_thaw_time use hvm_get/set_guest_time, they now no longer freeze TSC
2017 Apr 13
3
[PATCH v2 00/11] x86: xen cpuid() cleanup
Reduce special casing of xen_cpuid() by using cpu capabilities instead of faked cpuid nodes. This cleanup enables us remove the hypervisor specific set_cpu_features callback as the same effect can be reached via setup_[clear|force]_cpu_cap(). Removing the rest faked nodes from xen_cpuid() requires some more work as the remaining cases (mwait leafs and extended topology info) have to be handled
2017 Apr 13
3
[PATCH v2 00/11] x86: xen cpuid() cleanup
Reduce special casing of xen_cpuid() by using cpu capabilities instead of faked cpuid nodes. This cleanup enables us remove the hypervisor specific set_cpu_features callback as the same effect can be reached via setup_[clear|force]_cpu_cap(). Removing the rest faked nodes from xen_cpuid() requires some more work as the remaining cases (mwait leafs and extended topology info) have to be handled
2006 Apr 09
3
reading time value in dom0 and domU kernels
Hi Folks, I want to calculate latency in transferring a buffer from domU kernel to dom0 kernel and vice versa. for that I need a time ''flavour'' (cycle counter time?) which reads the same in dom0 and domU. Could someone please let me know if cycle counter time is the right time to use? if not then which one (system time or wall clock time)? Also could someone please tell me how to
2017 Apr 13
0
[PATCH v2 10/11] vmware: set cpu capabilities during platform initialization
...+/* + * VMware hypervisor takes care of exporting a reliable TSC to the guest. + * Still, due to timing difference when running on virtual cpus, the TSC can + * be marked as unstable in some cases. For example, the TSC sync check at + * bootup can fail due to a marginal offset between vcpus' TSCs (though the + * TSCs do not drift from each other). Also, the ACPI PM timer clocksource + * is not suitable as a watchdog when running on a hypervisor because the + * kernel may miss a wrap of the counter if the vcpu is descheduled for a + * long time. To skip these checks at runtime we set these...
2017 Apr 18
1
[PATCH v3 00/11] x86: xen cpuid() cleanup
Reduce special casing of xen_cpuid() by using cpu capabilities instead of faked cpuid nodes. This cleanup enables us remove the hypervisor specific set_cpu_features callback as the same effect can be reached via setup_[clear|force]_cpu_cap(). Removing the rest faked nodes from xen_cpuid() requires some more work as the remaining cases (mwait leafs and extended topology info) have to be handled
2017 Apr 18
1
[PATCH v3 00/11] x86: xen cpuid() cleanup
Reduce special casing of xen_cpuid() by using cpu capabilities instead of faked cpuid nodes. This cleanup enables us remove the hypervisor specific set_cpu_features callback as the same effect can be reached via setup_[clear|force]_cpu_cap(). Removing the rest faked nodes from xen_cpuid() requires some more work as the remaining cases (mwait leafs and extended topology info) have to be handled
2007 Mar 26
12
System time monotonicity
It seems that VCPU system time isn''t monotonic (using 3.0.4). It seems it might be correlated to when a VCPU is switched across real CPUs but I haven''t conclusively proved that. But e.g.: { old = { time = { version = 0x4ec pad0 = 0xe8e0 tsc_timestamp = 0x22cc8398b7194 system_time =
2016 Oct 27
0
[RESEND PATCH 3/3] x86/vmware: Add paravirt sched clock
...you start to explain something which is understandable > no-vmw-sched-clock kernel parameter is added to disable the paravirt > sched clock. I give you another example: The default sched_clock() implementation is native_sched_clock(). It contains code to handle non constant frequency TSCs, which creates overhead for systems with constant frequency TSCs. The vmware hypervisor guarantees a constant frequency TSC, so native_sched_clock() is not required and slower than a dedicated function which operates with one time calculated conversion factors. Calculate the conversion...
2018 Sep 18
3
[patch 09/11] x86/vdso: Simplify the invalid vclock case
...at this "last" thing is needed at >>> all. John, what's the scenario under which we need it? >> >> So my memory is probably a bit foggy, but I recall that as we >> accelerated gettimeofday, we found that even on systems that claimed >> to have synced TSCs, they were actually just slightly out of sync. >> Enough that right after cycles_last had been updated, a read on >> another cpu could come in just behind cycles_last, resulting in a >> negative interval causing lots of havoc. >> >> So the sanity check is needed to av...
2018 Sep 18
3
[patch 09/11] x86/vdso: Simplify the invalid vclock case
...at this "last" thing is needed at >>> all. John, what's the scenario under which we need it? >> >> So my memory is probably a bit foggy, but I recall that as we >> accelerated gettimeofday, we found that even on systems that claimed >> to have synced TSCs, they were actually just slightly out of sync. >> Enough that right after cycles_last had been updated, a read on >> another cpu could come in just behind cycles_last, resulting in a >> negative interval causing lots of havoc. >> >> So the sanity check is needed to av...
2004 Mar 09
1
vector extraction
Hello, I could need some help on this one: >From the data.frame "Test.dataset2" below (TSCS data for 151 "countries.to.map" for "year" 1973-95; each "country.to.map" is described by a unique code), I would like to extract a vector "color" that for each "country.to.map" takes on the value of "dv" (a categorical variable with value...
2006 Jun 12
2
time went backwards
I continue to see occasional ''time went backwards'' messages on 3.0-testing on larger systems. Is anyone else seeing such? Have there been any improvements to -unstable that haven''t been moved over? If so, can anyone point out the respective changesets? Thanks, Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com
2018 Sep 18
2
[patch 09/11] x86/vdso: Simplify the invalid vclock case
...s "last" thing is needed at > > > all. John, what's the scenario under which we need it? > > > > So my memory is probably a bit foggy, but I recall that as we > > accelerated gettimeofday, we found that even on systems that claimed > > to have synced TSCs, they were actually just slightly out of sync. > > Enough that right after cycles_last had been updated, a read on > > another cpu could come in just behind cycles_last, resulting in a > > negative interval causing lots of havoc. > > > > So the sanity check is needed...
2018 Sep 18
2
[patch 09/11] x86/vdso: Simplify the invalid vclock case
...s "last" thing is needed at > > > all. John, what's the scenario under which we need it? > > > > So my memory is probably a bit foggy, but I recall that as we > > accelerated gettimeofday, we found that even on systems that claimed > > to have synced TSCs, they were actually just slightly out of sync. > > Enough that right after cycles_last had been updated, a read on > > another cpu could come in just behind cycles_last, resulting in a > > negative interval causing lots of havoc. > > > > So the sanity check is needed...
2018 Sep 27
1
[patch 09/11] x86/vdso: Simplify the invalid vclock case
...> > Not really. It's sufficient to offset it by at max. 1000 cycles or so. That > won't hurt the magic loop, but it will definitely cover that slight offset > case. I got it working, but first of all the gain is close to 0. There is this other subtle issue that we've seen TSCs slowly drifting apart which is caught by the TSC watchdog eventually, but if it exeeds the offset _before_ the watchdog triggers, we're back to square one. So I rather stay on the safe side and just accept that we have to deal with that. Sigh. Thanks, tglx
2010 Sep 17
2
Constant vs Nonstop vs Invariant TSC question
...0x80000007) & (1u<<8)) { set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability); set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability); set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability); } I am trying to determine the difference between the constant vs nonstop vs invariant TSCs in newer processors. I understand constant tsc means the rate of the counter won''t vary if the CPU freq changes and non-stop means that it even continues to count when the cpu is in a low power state. When I read Intel''s Designer''s vol3b, section 16.11.1 Invariant TSC...
2023 Mar 07
2
Bug#1032480: xen: Important cherry-picks for bookworm/updates
...1 Severity: important Two major bugs have shown with the release of new hardware from AMD. Since the new hardware is likely to become common during the life of Debian/bookworm, you may wish to grab them early: ad15a0a8ca2515d8ac58edfc0bc1d3719219cb77 x86/time: prevent overflow with high frequency TSCs Turns out the latest generation is fast enough to cause overflows. I haven't found a patch for the other one yet. There is some issue with the latest generation which needs "x2apic=false" on Xen's command-line in order to get interrupts to domain 0. I'm guessing the late...
2018 Sep 18
2
[patch 09/11] x86/vdso: Simplify the invalid vclock case
...at >>>>> all. John, what's the scenario under which we need it? >>>> >>>> So my memory is probably a bit foggy, but I recall that as we >>>> accelerated gettimeofday, we found that even on systems that claimed >>>> to have synced TSCs, they were actually just slightly out of sync. >>>> Enough that right after cycles_last had been updated, a read on >>>> another cpu could come in just behind cycles_last, resulting in a >>>> negative interval causing lots of havoc. >>>> >>>...
2018 Sep 18
2
[patch 09/11] x86/vdso: Simplify the invalid vclock case
...at >>>>> all. John, what's the scenario under which we need it? >>>> >>>> So my memory is probably a bit foggy, but I recall that as we >>>> accelerated gettimeofday, we found that even on systems that claimed >>>> to have synced TSCs, they were actually just slightly out of sync. >>>> Enough that right after cycles_last had been updated, a read on >>>> another cpu could come in just behind cycles_last, resulting in a >>>> negative interval causing lots of havoc. >>>> >>>...