Displaying 3 results from an estimated 3 matches for "trgblock".
2018 Mar 22
2
ARM Backend BuildMI operand issues
...(ModulePass), insert Blocks and create
instructions using BuildMI.
I started with branch instructions:
const TargetMachine &TM = MF.getTarget();
const MCInstrInfo *TII = TM.getMCInstrInfo();
DebugLoc DL;
BuildMI(BB, BB.end(), DL, TII->get(ARM::B)).addMBB(trgBlock);
these are working fine.
When creating an compare instruction like cmp r0, 1 with:
BuildMI(BB, BB.end(), DL, TII->get(ARM::tCMPi8),0).addImm(1);
I get the following error:
.../include/llvm/MC/MCInst.h:81: int64_t
llvm::MCOperand::getImm() const: Assertion `isImm() &am...
2018 Mar 22
0
ARM Backend BuildMI operand issues
...ks and create instructions using BuildMI.
> I started with branch instructions:
>
> const TargetMachine &TM = MF.getTarget();
> const MCInstrInfo *TII = TM.getMCInstrInfo();
> DebugLoc DL;
> BuildMI(BB, BB.end(), DL, TII->get(ARM::B)).addMBB(trgBlock);
>
> these are working fine.
> When creating an compare instruction like cmp r0, 1 with:
>
> BuildMI(BB, BB.end(), DL, TII->get(ARM::tCMPi8),0).addImm(1);
>
> I get the following error:
>
> .../include/llvm/MC/MCInst.h:81: int64_t llvm::MCOperand:...
2018 Mar 23
1
ARM Backend BuildMI operand issues
...using BuildMI.
>> I started with branch instructions:
>>
>> const TargetMachine &TM = MF.getTarget();
>> const MCInstrInfo *TII = TM.getMCInstrInfo();
>> DebugLoc DL;
>> BuildMI(BB, BB.end(), DL, TII->get(ARM::B)).addMBB(trgBlock);
>>
>> these are working fine.
>> When creating an compare instruction like cmp r0, 1 with:
>>
>> BuildMI(BB, BB.end(), DL, TII->get(ARM::tCMPi8),0).addImm(1);
>>
>> I get the following error:
>>
>> .../include/llvm/MC/MCI...