Displaying 6 results from an estimated 6 matches for "topinst".
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nopinst
2016 Dec 21
0
Assign different RegClasses to a virtual register based on 'uniform' attribute?
...one by
> > the SIFixSGPRCopiesPass, which relies heavily on
> > SIInstrInfo::moveToVALU().
>
> Hi Tom,
>
> I take a look at the code, it looks like a good idea. It really helps me a lot. Thanks Tom! I have a question for the code, why it only pass copy-like instructions as TopInst to moveToALU()? Is there any special reason to do like this? I thought that iterating through all the MIs and fix regClass if needed would be ok. Am I thinking it too simple?
>
> - Ruiling
> >
> > -Tom
> >
> > > - Ruiling
>
>
>
>
> --
> - Ru...
2016 Dec 21
3
Assign different RegClasses to a virtual register based on 'uniform' attribute?
...to the vector ALU. This is done by
> the SIFixSGPRCopiesPass, which relies heavily on
> SIInstrInfo::moveToVALU().
Hi Tom,
I take a look at the code, it looks like a good idea. It really helps me a
lot. Thanks Tom! I have a question for the code, why it only pass copy-like
instructions as TopInst to moveToALU()? Is there any special reason to do
like this? I thought that iterating through all the MIs and fix regClass if
needed would be ok. Am I thinking it too simple?
- Ruiling
>
> -Tom
>
> > - Ruiling
--
- Ruiling
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2016 Dec 21
1
Assign different RegClasses to a virtual register based on 'uniform' attribute?
...xSGPRCopiesPass, which relies heavily on
> > > SIInstrInfo::moveToVALU().
> >
> > Hi Tom,
> >
> > I take a look at the code, it looks like a good idea. It really helps me a lot. Thanks Tom! I have a question for the code, why it only pass copy-like instructions as TopInst to moveToALU()? Is there any special reason to do like this? I thought that iterating through all the MIs and fix regClass if needed would be ok. Am I thinking it too simple?
> >
> > - Ruiling
> > >
> > > -Tom
> > >
> > > > - Ruiling
> >
&...
2013 Jun 21
0
[LLVMdev] Query regarding CallInst::Create
......}
It is being declared in the module using:
> func = mod->getOrInsertFunction("test_print", Type::getInt32Ty(ctx),
> (Type*)0);
> f = cast<Function>(func);
The call instruction is being inserted using:
> Instruction *newInst = CallInst::Create(f, "", topInst);
Any help wrt this error would be really appreciated.
Thanks.
PS: Though similar, this is different from
http://lists.cs.uiuc.edu/pipermail/llvmdev/2011-August/042845.html as I do
not make use of builder.
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2016 Dec 20
0
Assign different RegClasses to a virtual register based on 'uniform' attribute?
On Tue, Dec 20, 2016 at 11:00:09AM +0800, Ruiling Song wrote:
> Hi,
>
> I am working on a new LLVM target for Intel GPU, which also has same kind
> of scalar/vector register classes used in AMDGPU target. Like for a i32
> virtual register, it will be held in scalar register if its value is
> uniform across a wavefront/warp, otherwise it will be in a vector register.
> Does
2016 Dec 23
0
Assign different RegClasses to a virtual, register based on 'uniform' attribute?
...he SIFixSGPRCopiesPass, which relies heavily on
>>> SIInstrInfo::moveToVALU().
>> Hi Tom,
>>
>> I take a look at the code, it looks like a good idea. It really helps me
> a lot. Thanks Tom! I have a question for the code, why it only pass
> copy-like instructions as TopInst to moveToALU()? Is there any special
> reason to do like this? I thought that iterating through all the MIs and
> fix regClass if needed would be ok. Am I thinking it too simple?
>> - Ruiling
>>> -Tom
>>>
>>>> - Ruiling
>>
>>
>>
>> -...