Displaying 4 results from an estimated 4 matches for "to_subreg".
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2007 Jun 06
2
[LLVMdev] Register based vector insert/extract
...for writting
> patterns in the .td file instead of requiring custom matching
> code.
> 7. The register allocator needs to rewrite subreg references using
> #1. This should be very simple.
For 5 I am currently creating new binary SDNodes for 'from_subreg'
and 'to_subreg' in ISD, is this in line with your thinking for the
design Chris? The issue I ran into is that you essentially need
subreg insert and extract.
--
Christopher Lamb
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2007 Jun 06
0
[LLVMdev] Register based vector insert/extract
...s in the .td file instead of requiring custom matching
>> code.
>> 7. The register allocator needs to rewrite subreg references using
>> #1. This should be very simple.
>
>
> For 5 I am currently creating new binary SDNodes for 'from_subreg'
> and 'to_subreg' in ISD, is this in line with your thinking for the
> design Chris? The issue I ran into is that you essentially need
> subreg insert and extract.
>
> --
> Christopher Lamb
>
>
>
> _______________________________________________
> LLVM Developers mailing list
&...
2007 Apr 24
0
[LLVMdev] Register based vector insert/extract
On Tue, 24 Apr 2007, Christopher Lamb wrote:
>>> I have other higher priority tasks right now, but I think we'll want
>>> to have this in sooner rather than later. If you have any pointers on
>>> a good starting point it'd be mighty helpful. If I can get a grasp on
>>> it I'll start incremental work in the background.
>>
>> It's
2007 Apr 24
2
[LLVMdev] Register based vector insert/extract
On Apr 23, 2007, at 8:22 PM, Evan Cheng wrote:
>
> On Apr 23, 2007, at 4:07 PM, Christopher Lamb wrote:
>
>> Thanks for the detailed response.
>>
>> On Apr 23, 2007, at 4:22 PM, Chris Lattner wrote:
>>
>>> Right. Evan is currently focusing on getting the late stages of
>>> the code
>>> generator (e.g. livevars) to be able to understand