search for: lo_sub_reg

...of the register being redefined unless the <undef> flag is set. Now, I am writing a pass the splits the following sequence of MIs MI1:: A<def> = 0xFFFFFFFF ; A is a 64bit super reg. MI2:: B<def> = C & A ; C and B are also 64bit super regs. Into NewMI_1:: B:lo_sub_reg<def> = COPY C:lo_sub_reg. NewMI_2:: B:hi_sub_reg<def> = 0 The question is how should I be setting up the <undef> flags on the def operands of NewMI_1 and 2 ? Should I set the <undef> flag only on NewMI_1 because in NewMI_2 lo_sub_reg has already been defined by NewMI_1? Or...

...B has multiple definitions. Just use a REG_SEQUENCE > instruction, and let the register allocator do the transformation for you. Aaargh. So you mean something like this ? New_MI_1:: Vreg1 = 0 ; Vreg1 and Vreg2 are 32 bit virt. regs. New_MI_2:: Vreg2 = COPY C:lo_sub_reg. New_MI_3:: B= REG_SEQUENCE<Vreg1, hi_sub_reg, Vreg2, lo_sub_reg> ; B is a 64 bit virt reg. TIA, Pranav

...he <undef> flag is set. > > Now, I am writing a pass the splits the following sequence of MIs > > MI1:: A<def> = 0xFFFFFFFF ; A is a 64bit super reg. > MI2:: B<def> = C & A ; C and B are also 64bit super regs. > > Into > NewMI_1:: B:lo_sub_reg<def> = COPY C:lo_sub_reg. > NewMI_2:: B:hi_sub_reg<def> = 0 > > The question is how should I be setting up the <undef> flags on the def > operands of NewMI_1 and 2 ? Should I set the <undef> flag only on NewMI_1 > because in NewMI_2 lo_sub_reg has already be...

Hi Jakob, > New_MI_1:: Vreg1 = 0 ; Vreg1 and Vreg2 > are 32 bit virt. regs. > New_MI_2:: Vreg2 = COPY C:lo_sub_reg. > New_MI_3:: B= REG_SEQUENCE<Vreg1, hi_sub_reg, Vreg2, lo_sub_reg> ; B > is a > 64 bit virt reg. I used this approach and it worked find until I hit, what I believe is, a bug in the register coalescer. When the register coalescer cannot trivially coalesce a copy, say C,, it calls...

On Jul 5, 2012, at 6:01 PM, "Pranav Bhandarkar" <pranavb at codeaurora.org> wrote: > Hi Jakob, > >> New_MI_1:: Vreg1 = 0 ; Vreg1 and Vreg2 >> are 32 bit virt. regs. >> New_MI_2:: Vreg2 = COPY C:lo_sub_reg. >> New_MI_3:: B= REG_SEQUENCE<Vreg1, hi_sub_reg, Vreg2, lo_sub_reg> ; B >> is a >> 64 bit virt reg. > > I used this approach and it worked find until I hit, what I believe is, a > bug in the register coalescer. > When the register coalescer cannot trivially c...