Displaying 6 results from an estimated 6 matches for "tmp95".
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tmp5
2017 Jul 24
2
LazyValueInfo vs ScalarEvolution
...Info and ScalarEvolution can calculate a constant range for
an LLVM Value.
I found that some times they do not agree, may be I interpreted them
incorrectly
For example in the following IR:
bb85: ; preds = %bb85, %bb73
%tmp86 = phi i32 [ 1, %bb73 ], [ %tmp95, %bb85 ]
%tmp95 = add nsw i32 %tmp86, 1
%tmp96 = icmp slt i32 %tmp95, 20
br i1 %tmp96, label %bb85, label %bb97
LazyValueInfo give:
POP %tmp86 = phi i32 [ 1, %bb73 ], [ %tmp95, %bb85 ] in bb85 =
constantrange<-2147483648, 20>
While ScalarEvolution give:
%tmp86 = phi i32 [ 1, %bb7...
2017 Jul 24
2
LazyValueInfo vs ScalarEvolution
...LLVM Value.
>> I found that some times they do not agree, may be I interpreted them
>> incorrectly
>>
>> For example in the following IR:
>>
>> bb85: ; preds = %bb85, %bb73
>> %tmp86 = phi i32 [ 1, %bb73 ], [ %tmp95, %bb85 ]
>> %tmp95 = add nsw i32 %tmp86, 1
>> %tmp96 = icmp slt i32 %tmp95, 20
>> br i1 %tmp96, label %bb85, label %bb97
>>
>> LazyValueInfo give:
>>
>> POP %tmp86 = phi i32 [ 1, %bb73 ], [ %tmp95, %bb85 ] in bb85 =
>> constantrange<-214...
2012 Aug 10
2
[LLVMdev] GVN miscompile debugging help
I found a case where GVN seems to miscompile an OpenCL program. What I am trying to figure out is given a bitcode file, how can I reduce it to a simpler case with bugpoint when I don't have a valid reference compiler available.
Thanks for any tips,
Micah
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2008 Aug 21
2
[LLVMdev] Dependence Analysis [was: Flow-Sensitive AA]
Great, thanks! How much work do you think it will take to bring it up
to date with the LLVM IR, except *ignoring* first-class structs and
arrays for now? I believe llvm-gcc does not generate those in most
cases and we can do a lot without supporting those. What else is
missing relative to the current LLVM IR?
Thanks,
--Vikram
Associate Professor, Computer Science
University of
2018 Oct 10
5
PROPOSAL: Extend inline asm syntax with size spec
On Wed, Oct 10, 2018 at 01:54:33PM -0500, Segher Boessenkool wrote:
> It would be great to hear from kernel people if it works adequately for
> what you guys want it for :-)
Sure, ping me when you have the final version and I'll try to build gcc
with it and do some size comparisons.
Thx.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the
2018 Oct 10
5
PROPOSAL: Extend inline asm syntax with size spec
On Wed, Oct 10, 2018 at 01:54:33PM -0500, Segher Boessenkool wrote:
> It would be great to hear from kernel people if it works adequately for
> what you guys want it for :-)
Sure, ping me when you have the final version and I'll try to build gcc
with it and do some size comparisons.
Thx.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the